Add in the multiplication factor (MF) setting for the PLPRCR so we can

get a reasonable clock value for the FADS.
Relax some uses of BCSR4 bits for more fads daughter boards.
Delete some unused CPM defined that were holdovers from the 8xxROM era.

diff --git a/include/config_FADS850SAR.h b/include/config_FADS850SAR.h
index 67800c2b7697b1b198bed51e1647ee12468a33ff..67483400d0bb521934a940de3543751797f22ba5 100644 (file)
--- a/include/config_FADS850SAR.h
+++ b/include/config_FADS850SAR.h
@@ -165,7 +165,8 @@
  * Reset PLL lock status sticky bit, timer expired status bit and timer  *
  * interrupt status bit - leave PLL multiplication factor unchanged !
  */
-#define CFG_PLPRCR     (PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST)
+#define CFG_PLPRCR     (((MPC8XX_FACT-1) << 20) | \
+                               PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST)
 
 /*-----------------------------------------------------------------------
  * SCCR - System Clock and reset Control Register              15-27
@@ -357,15 +358,8 @@
 #ifdef CONFIG_MPC860T
 #define BCSR4_FETHRST            ((uint)0x00200000)
 #endif /* CONFIG_MPC860T */
-#ifdef CONFIG_MPC823
 #define BCSR4_MODEM_EN           ((uint)0x00100000)
-#endif /* CONFIG_MPC823 */
-#ifdef CONFIG_MPC823
-#define BCSR4_DATA_VOICE         ((uint)0x00080000)
-#endif /* CONFIG_MPC823 */
-#ifdef CONFIG_MPC850
 #define BCSR4_DATA_VOICE         ((uint)0x00080000)
-#endif /* CONFIG_MPC50 */
 
 #define CONFIG_DRAM_50MHZ              1
 #define CONFIG_SDRAM_50MHZ
@@ -386,16 +380,6 @@
 */
 #define _MACH_8xx (_MACH_fads)
 
-/*
- * MPC8xx CPM Options
- */
-#define CONFIG_SCC_ENET 1
-#define CONFIG_SCC1_ENET 1
-#define CONFIG_FEC_ENET 1
-#undef  CONFIG_CPM_IIC
-#undef  CONFIG_UCODE_PATCH
-
-
 #define CONFIG_DISK_SPINUP_TIME 1000000