drm/amd/pm: correct SMU OverridePcieParameters related settings

Correct the hw initialization sequence.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 85fbb18a9e4bda1148179a1417c8c3ce306761ff..612d07762306cb2a54776c19d1064da7eff5a553 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -1218,6 +1218,17 @@ static int smu_smc_hw_setup(struct smu_context *smu)
        if (!smu_is_dpm_running(smu))
                dev_info(adev->dev, "dpm has been disabled\n");
 
+       /*
+        * Set initialized values (get from vbios) to dpm tables context such as
+        * gfxclk, memclk, dcefclk, and etc. And enable the DPM feature for each
+        * type of clks.
+        */
+       ret = smu_set_default_dpm_table(smu);
+       if (ret) {
+               dev_err(adev->dev, "Failed to setup default dpm clock tables!\n");
+               return ret;
+       }
+
        if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN4)
                pcie_gen = 3;
        else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3)
@@ -1261,17 +1272,6 @@ static int smu_smc_hw_setup(struct smu_context *smu)
                return ret;
        }
 
-       /*
-        * Set initialized values (get from vbios) to dpm tables context such as
-        * gfxclk, memclk, dcefclk, and etc. And enable the DPM feature for each
-        * type of clks.
-        */
-       ret = smu_set_default_dpm_table(smu);
-       if (ret) {
-               dev_err(adev->dev, "Failed to setup default dpm clock tables!\n");
-               return ret;
-       }
-
        ret = smu_notify_display_change(smu);
        if (ret) {
                dev_err(adev->dev, "Failed to notify display change!\n");