]> www.infradead.org Git - users/hch/misc.git/commitdiff
perf arm_spe: Set HITM flag
authorLeo Yan <leo.yan@arm.com>
Fri, 12 Sep 2025 15:42:18 +0000 (16:42 +0100)
committerArnaldo Carvalho de Melo <acme@redhat.com>
Fri, 19 Sep 2025 15:14:29 +0000 (12:14 -0300)
Since FEAT_SPEv1p4, Arm SPE provides two extra events: "Cache data
modified" and "Data snooped".

Set the snoop mode as:

- If both the "Cache data modified" event and the "Data snooped" event
  are set, which indicates a load operation that snooped from a outside
  cache and hit a modified copy, set the HITM flag to inspect false
  sharing.

- If the snooped event bit is not set, and the snooped event has been
  supported by the hardware, set as NONE mode (no snoop operation).

- If the snooped event bit is not set, and the event is not supported or
  absent the events info in the meta data, set as NA mode (not
  available).

Don't set any mode for only "Cache data modified" event, as it hits a
local modified copy.

Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Leo Yan <leo.yan@arm.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ali Saidi <alisaidi@amazon.com>
Cc: German Gomez <german.gomez@arm.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Will Deacon <will@kernel.org>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
tools/perf/util/arm-spe-decoder/arm-spe-decoder.h
tools/perf/util/arm-spe.c

index 3afa8703b21db9d231eef93fe981e0c20d562e83..fbb57f8052371e51d562d9dd6098e97fc099461c 100644 (file)
@@ -28,6 +28,8 @@
 #define ARM_SPE_L2D_ACCESS             BIT(EV_L2D_ACCESS)
 #define ARM_SPE_L2D_MISS               BIT(EV_L2D_MISS)
 #define ARM_SPE_RECENTLY_FETCHED       BIT(EV_RECENTLY_FETCHED)
+#define ARM_SPE_DATA_SNOOPED           BIT(EV_DATA_SNOOPED)
+#define ARM_SPE_HITM                   BIT(EV_CACHE_DATA_MODIFIED)
 
 enum arm_spe_op_type {
        /* First level operation type */
index 58f80b5c0ab969448c962adb31abde5067cf4be3..08cb493c3265ade3093c84a90fa5e47dcd77c8f1 100644 (file)
@@ -894,9 +894,12 @@ static void arm_spe__synth_st_memory_level(const struct arm_spe_record *record,
        }
 }
 
-static void arm_spe__synth_memory_level(const struct arm_spe_record *record,
+static void arm_spe__synth_memory_level(struct arm_spe_queue *speq,
+                                       const struct arm_spe_record *record,
                                        union perf_mem_data_src *data_src)
 {
+       struct arm_spe *spe = speq->spe;
+
        if (data_src->mem_op == PERF_MEM_OP_LOAD)
                arm_spe__synth_ld_memory_level(record, data_src);
        if (data_src->mem_op == PERF_MEM_OP_STORE)
@@ -907,6 +910,25 @@ static void arm_spe__synth_memory_level(const struct arm_spe_record *record,
                data_src->mem_lvl_num = PERF_MEM_LVLNUM_NA;
        }
 
+       if (record->type & ARM_SPE_DATA_SNOOPED) {
+               if (record->type & ARM_SPE_HITM)
+                       data_src->mem_snoop = PERF_MEM_SNOOP_HITM;
+               else
+                       data_src->mem_snoop = PERF_MEM_SNOOP_HIT;
+       } else {
+               u64 *metadata = arm_spe__get_metadata_by_cpu(spe, speq->cpu);
+
+               /*
+                * Set NA ("Not available") mode if no meta data or the
+                * SNOOPED event is not supported.
+                */
+               if (!metadata ||
+                   !(metadata[ARM_SPE_CAP_EVENT_FILTER] & ARM_SPE_DATA_SNOOPED))
+                       data_src->mem_snoop = PERF_MEM_SNOOP_NA;
+               else
+                       data_src->mem_snoop = PERF_MEM_SNOOP_NONE;
+       }
+
        if (record->type & ARM_SPE_REMOTE_ACCESS)
                data_src->mem_remote = PERF_MEM_REMOTE_REMOTE;
 }
@@ -963,7 +985,7 @@ arm_spe__synth_data_source(struct arm_spe_queue *speq,
                return data_src;
 
        if (!arm_spe__synth_ds(speq, record, &data_src))
-               arm_spe__synth_memory_level(record, &data_src);
+               arm_spe__synth_memory_level(speq, record, &data_src);
 
        if (record->type & (ARM_SPE_TLB_ACCESS | ARM_SPE_TLB_MISS)) {
                data_src.mem_dtlb = PERF_MEM_TLB_WK;