crypto: hisilicon/zip - remove unnecessary validation for high-performance mode confi...

When configuring the high-performance mode register, there is no
need to verify whether the register has been successfully
enabled, as there is no possibility of a write failure for this
register.

Fixes: a9864bae1806 ("crypto: hisilicon/zip - add zip comp high perf mode configuration")
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/hisilicon/zip/zip_main.c b/drivers/crypto/hisilicon/zip/zip_main.c
index d8ba23b7cc7ddf7dd849d1560929bde1a70860c3..fb7b19927dd321872b65f70154837b90262e61be 100644 (file)
--- a/drivers/crypto/hisilicon/zip/zip_main.c
+++ b/drivers/crypto/hisilicon/zip/zip_main.c
@@ -448,10 +448,9 @@ bool hisi_zip_alg_support(struct hisi_qm *qm, u32 alg)
        return false;
 }
 
-static int hisi_zip_set_high_perf(struct hisi_qm *qm)
+static void hisi_zip_set_high_perf(struct hisi_qm *qm)
 {
        u32 val;
-       int ret;
 
        val = readl_relaxed(qm->io_base + HZIP_HIGH_PERF_OFFSET);
        if (perf_mode == HZIP_HIGH_COMP_PERF)
@@ -461,13 +460,6 @@ static int hisi_zip_set_high_perf(struct hisi_qm *qm)
 
        /* Set perf mode */
        writel(val, qm->io_base + HZIP_HIGH_PERF_OFFSET);
-       ret = readl_relaxed_poll_timeout(qm->io_base + HZIP_HIGH_PERF_OFFSET,
-                                        val, val == perf_mode, HZIP_DELAY_1_US,
-                                        HZIP_POLL_TIMEOUT_US);
-       if (ret)
-               pci_err(qm->pdev, "failed to set perf mode\n");
-
-       return ret;
 }
 
 static void hisi_zip_open_sva_prefetch(struct hisi_qm *qm)
@@ -1251,9 +1243,7 @@ static int hisi_zip_pf_probe_init(struct hisi_zip *hisi_zip)
        if (ret)
                return ret;
 
-       ret = hisi_zip_set_high_perf(qm);
-       if (ret)
-               return ret;
+       hisi_zip_set_high_perf(qm);
 
        hisi_zip_open_sva_prefetch(qm);
        hisi_qm_dev_err_init(qm);