arm64: dts: mediatek: mt8188: add lvts definitions

Various values extracted from the vendor's kernel driver.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Link: https://lore.kernel.org/r/20240402032729.2736685-14-nico@fluxnic.net
[Angelo: Fixed wrong nvmem-cell-names]
Signed-off-by: Julien Panis <jpanis@baylibre.com>
Link: https://lore.kernel.org/r/20240603-mtk-thermal-mt818x-dtsi-v7-5-8c8e3c7a3643@baylibre.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
index 29d012d28edb1b81f1e5cbc0d3228d24818dcd7a..02786fe9891bb16cabb1051e1927a77a146f1e90 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
@@ -12,6 +12,7 @@
 #include <dt-bindings/phy/phy.h>
 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h>
 #include <dt-bindings/power/mediatek,mt8188-power.h>
+#include <dt-bindings/reset/mt8188-resets.h>
 
 / {
        compatible = "mediatek,mt8188";
@@ -464,6 +465,7 @@
                        compatible = "mediatek,mt8188-infracfg-ao", "syscon";
                        reg = <0 0x10001000 0 0x1000>;
                        #clock-cells = <1>;
+                       #reset-cells = <1>;
                };
 
                pericfg: syscon@10003000 {
@@ -937,6 +939,17 @@
                        status = "disabled";
                };
 
+               lvts_ap: thermal-sensor@1100b000 {
+                       compatible = "mediatek,mt8188-lvts-ap";
+                       reg = <0 0x1100b000 0 0xc00>;
+                       interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 0>;
+                       clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
+                       resets = <&infracfg_ao MT8188_INFRA_RST1_THERMAL_CTRL_RST>;
+                       nvmem-cells = <&lvts_efuse_data1>;
+                       nvmem-cell-names = "lvts-calib-data-1";
+                       #thermal-sensor-cells = <1>;
+               };
+
                spi1: spi@11010000 {
                        compatible = "mediatek,mt8188-spi-ipm", "mediatek,spi-ipm";
                        #address-cells = <1>;
@@ -1050,6 +1063,17 @@
                        status = "disabled";
                };
 
+               lvts_mcu: thermal-sensor@11278000 {
+                       compatible = "mediatek,mt8188-lvts-mcu";
+                       reg = <0 0x11278000 0 0x1000>;
+                       interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 0>;
+                       clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
+                       resets = <&infracfg_ao MT8188_INFRA_RST1_THERMAL_MCU_RST>;
+                       nvmem-cells = <&lvts_efuse_data1>;
+                       nvmem-cell-names = "lvts-calib-data-1";
+                       #thermal-sensor-cells = <1>;
+               };
+
                i2c0: i2c@11280000 {
                        compatible = "mediatek,mt8188-i2c";
                        reg = <0 0x11280000 0 0x1000>,
@@ -1273,6 +1297,17 @@
                        #clock-cells = <1>;
                };
 
+               efuse: efuse@11f20000 {
+                       compatible = "mediatek,mt8188-efuse", "mediatek,efuse";
+                       reg = <0 0x11f20000 0 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       lvts_efuse_data1: lvts1-calib@1ac {
+                               reg = <0x1ac 0x40>;
+                       };
+               };
+
                gpu: gpu@13000000 {
                        compatible = "mediatek,mt8188-mali", "arm,mali-valhall-jm";
                        reg = <0 0x13000000 0 0x4000>;