now that the EEPROM code is much faster this seems acceptable.
#define CFG_ENV_IS_IN_EEPROM 1
#define CFG_ENV_OFFSET 0 /* Start right at beginning of NVRAM */
-#define CFG_ENV_SIZE 512 /* Use only a part of it - it's slow! */
+#define CFG_ENV_SIZE 1024 /* Use only a part of it - it's slow! */
/*-----------------------------------------------------------------------
* Cache Configuration