arm64: dts: imx8m: Add the ENET PPS interrupt

The i.MX8M SoCs have a fourth ENET interrupt dedicated to PPS (Pulse Per
Second). Add support for it.

Suggested-by: Rogerio Nunes <rogerio.nunes@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 76f040e4be5e97ee1e649d0bcd062eaa812d8b46..b83f400def8bc796179bd98263d7212a310f9a75 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -854,7 +854,8 @@
                                reg = <0x30be0000 0x10000>;
                                interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
-                                            <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+                                            <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX8MM_CLK_ENET1_ROOT>,
                                         <&clk IMX8MM_CLK_ENET1_ROOT>,
                                         <&clk IMX8MM_CLK_ENET_TIMER>,

diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 9385dd7d1a2f7f03646fc7a751777a547d326e92..746faf1cf2fb7deecfbb1a22419bd831bbbcbb33 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -741,7 +741,8 @@
                                reg = <0x30be0000 0x10000>;
                                interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
-                                            <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+                                            <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX8MN_CLK_ENET1_ROOT>,
                                         <&clk IMX8MN_CLK_ENET1_ROOT>,
                                         <&clk IMX8MN_CLK_ENET_TIMER>,

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 9de2aa1c573c7f41b34416d02bc767593b47e976..cad2dd790bec0b0b60a1b6a3ea50581e311dffc8 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -713,7 +713,8 @@
                                reg = <0x30be0000 0x10000>;
                                interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
-                                            <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+                                            <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX8MP_CLK_ENET1_ROOT>,
                                         <&clk IMX8MP_CLK_SIM_ENET_ROOT>,
                                         <&clk IMX8MP_CLK_ENET_TIMER>,

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index f70435cf9ad57c123339ebcc63b9776ed0f8af03..0d02ccdb0abc79f7c49bb4c5c69b9154ec917fd8 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1031,7 +1031,8 @@
                                reg = <0x30be0000 0x10000>;
                                interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
-                                            <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+                                            <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX8MQ_CLK_ENET1_ROOT>,
                                         <&clk IMX8MQ_CLK_ENET1_ROOT>,
                                         <&clk IMX8MQ_CLK_ENET_TIMER>,