drm/i915/psr: PSR2_CTL[Block Count Number] not needed for LunarLake

PSR2_CTL[Block Count Number] is not used by LunarLake do not configure it.

Bspec: 69885

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240517073005.2414293-4-jouni.hogander@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index d2f6488b8fc78c75b2da396def227f1f92007a3f..d18baeb971bbe7d19dff0733a142147defd24dbc 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -927,7 +927,7 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
 
        val |= intel_psr2_get_tp_time(intel_dp);
 
-       if (DISPLAY_VER(dev_priv) >= 12) {
+       if (DISPLAY_VER(dev_priv) >= 12 && DISPLAY_VER(dev_priv) < 20) {
                if (psr2_block_count(intel_dp) > 2)
                        val |= TGL_EDP_PSR2_BLOCK_COUNT_NUM_3;
                else