]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
perf vendor events riscv: Rename U74 to Bullet
authorSamuel Holland <samuel.holland@sifive.com>
Thu, 13 Feb 2025 01:21:34 +0000 (17:21 -0800)
committerNamhyung Kim <namhyung@kernel.org>
Mon, 10 Mar 2025 21:15:37 +0000 (14:15 -0700)
This set of PMU event descriptions applies not only to the SiFive U74
core configuration, but also to other SiFive cores that implement the
Bullet microarchitecture (such as U64, P270, and X280). Rename the
directory to be more generic.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Tested-by: Ian Rogers <irogers@google.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20250213220341.3215660-2-samuel.holland@sifive.com
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
tools/perf/pmu-events/arch/riscv/mapfile.csv
tools/perf/pmu-events/arch/riscv/sifive/bullet/firmware.json [moved from tools/perf/pmu-events/arch/riscv/sifive/u74/firmware.json with 100% similarity]
tools/perf/pmu-events/arch/riscv/sifive/bullet/instruction.json [moved from tools/perf/pmu-events/arch/riscv/sifive/u74/instructions.json with 100% similarity]
tools/perf/pmu-events/arch/riscv/sifive/bullet/memory.json [moved from tools/perf/pmu-events/arch/riscv/sifive/u74/memory.json with 100% similarity]
tools/perf/pmu-events/arch/riscv/sifive/bullet/microarch.json [moved from tools/perf/pmu-events/arch/riscv/sifive/u74/microarch.json with 100% similarity]

index 3d3a809a5446e8e811dcd6cc243c33c58811e0b1..521f416b000609d009d197bea38a3a408d362b89 100644 (file)
@@ -14,7 +14,7 @@
 #
 #
 #MVENDORID-MARCHID-MIMPID,Version,Filename,EventType
-0x489-0x8000000000000007-0x[[:xdigit:]]+,v1,sifive/u74,core
+0x489-0x8000000000000007-0x[[:xdigit:]]+,v1,sifive/bullet,core
 0x5b7-0x0-0x0,v1,thead/c900-legacy,core
 0x67e-0x80000000db0000[89]0-0x[[:xdigit:]]+,v1,starfive/dubhe-80,core
 0x31e-0x8000000000008a45-0x[[:xdigit:]]+,v1,andes/ax45,core