return 0;
 }
 
+static int smu7_power_off_asic(struct pp_hwmgr *hwmgr)
+{
+       int result;
+
+       result = smu7_disable_dpm_tasks(hwmgr);
+       PP_ASSERT_WITH_CODE((0 == result),
+                       "[disable_dpm_tasks] Failed to disable DPM!",
+                       );
+
+       return result;
+}
+
 static const struct pp_hwmgr_func smu7_hwmgr_funcs = {
        .backend_init = &smu7_hwmgr_backend_init,
        .backend_fini = &smu7_hwmgr_backend_fini,
        .get_power_profile_mode = smu7_get_power_profile_mode,
        .set_power_profile_mode = smu7_set_power_profile_mode,
        .get_performance_level = smu7_get_performance_level,
+       .power_off_asic = smu7_power_off_asic,
 };
 
 uint8_t smu7_get_sleep_divider_id_from_clock(uint32_t clock,
 
        smu8_update_low_mem_pstate(hwmgr, input);
 
        return 0;
-};
+}
 
 
 static int smu8_setup_asic_task(struct pp_hwmgr *hwmgr)
        hw_data->cc6_settings.cpu_pstate_disable = false;
 }
 
-static int smu8_power_off_asic(struct pp_hwmgr *hwmgr)
-{
-       smu8_power_up_display_clock_sys_pll(hwmgr);
-       smu8_clear_nb_dpm_flag(hwmgr);
-       smu8_reset_cc6_data(hwmgr);
-       return 0;
-};
-
 static void smu8_program_voting_clients(struct pp_hwmgr *hwmgr)
 {
        cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
        data->acp_boot_level = 0xff;
 }
 
+static int smu8_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
+{
+       smu8_program_voting_clients(hwmgr);
+       if (smu8_start_dpm(hwmgr))
+               return -EINVAL;
+       smu8_program_bootup_state(hwmgr);
+       smu8_reset_acp_boot_level(hwmgr);
+
+       return 0;
+}
+
 static int smu8_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
 {
        smu8_disable_nb_dpm(hwmgr);
                return -EINVAL;
 
        return 0;
-};
+}
 
-static int smu8_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
+static int smu8_power_off_asic(struct pp_hwmgr *hwmgr)
 {
-       smu8_program_voting_clients(hwmgr);
-       if (smu8_start_dpm(hwmgr))
-               return -EINVAL;
-       smu8_program_bootup_state(hwmgr);
-       smu8_reset_acp_boot_level(hwmgr);
-
+       smu8_disable_dpm_tasks(hwmgr);
+       smu8_power_up_display_clock_sys_pll(hwmgr);
+       smu8_clear_nb_dpm_flag(hwmgr);
+       smu8_reset_cc6_data(hwmgr);
        return 0;
-};
+}
 
 static int smu8_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
                                struct pp_power_state  *prequest_ps,