]> www.infradead.org Git - linux.git/commitdiff
arm64: dts: meson: a1: support USB controller in OTG mode
authorDmitry Rokosov <ddrokosov@sberdevices.ru>
Wed, 23 Aug 2023 21:36:21 +0000 (00:36 +0300)
committerNeil Armstrong <neil.armstrong@linaro.org>
Mon, 11 Sep 2023 09:42:52 +0000 (11:42 +0200)
Amlogic A1 SoC family has USB2.0 controller based on dwc2 and dwc3
heads. It supports otg/host/peripheral modes.

Signed-off-by: Yue Wang <yue.wang@amlogic.com>
Signed-off-by: Hanjie Lin <hanjie.lin@amlogic.com>
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230823213630.12936-7-ddrokosov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
arch/arm64/boot/dts/amlogic/meson-a1.dtsi

index 9aca885013c127b93f5e1340c847a1723355b0f5..2dd6ee074b2d8537e7935c2fc3d96fd7eae2dda6 100644 (file)
@@ -8,6 +8,8 @@
 #include <dt-bindings/gpio/meson-a1-gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/power/meson-a1-power.h>
+#include <dt-bindings/reset/amlogic,meson-a1-reset.h>
 
 / {
        compatible = "amlogic,a1";
                                status = "disabled";
                        };
 
+                       usb2_phy1: phy@4000 {
+                               compatible = "amlogic,a1-usb2-phy";
+                               clocks = <&clkc_periphs CLKID_USB_PHY_IN>;
+                               clock-names = "xtal";
+                               reg = <0x0 0x4000 0x0 0x60>;
+                               resets = <&reset RESET_USBPHY>;
+                               reset-names = "phy";
+                               #phy-cells = <0>;
+                               power-domains = <&pwrc PWRC_USB_ID>;
+                       };
+
                        clkc_pll: pll-clock-controller@7c80 {
                                compatible = "amlogic,a1-pll-clkc";
                                reg = <0 0x7c80 0 0x18c>;
                        };
                };
 
+               usb: usb@fe004400 {
+                       status = "disabled";
+                       compatible = "amlogic,meson-a1-usb-ctrl";
+                       reg = <0x0 0xfe004400 0x0 0xa0>;
+                       interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       ranges;
+
+                       clocks = <&clkc_periphs CLKID_USB_CTRL>,
+                                <&clkc_periphs CLKID_USB_BUS>,
+                                <&clkc_periphs CLKID_USB_CTRL_IN>;
+                       clock-names = "usb_ctrl", "usb_bus", "xtal_usb_ctrl";
+                       resets = <&reset RESET_USBCTRL>;
+                       reset-name = "usb_ctrl";
+
+                       dr_mode = "otg";
+
+                       phys = <&usb2_phy1>;
+                       phy-names = "usb2-phy1";
+
+                       dwc3: usb@ff400000 {
+                               compatible = "snps,dwc3";
+                               reg = <0x0 0xff400000 0x0 0x100000>;
+                               interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+                               dr_mode = "host";
+                               snps,dis_u2_susphy_quirk;
+                               snps,quirk-frame-length-adjustment = <0x20>;
+                               snps,parkmode-disable-ss-quirk;
+                       };
+
+                       dwc2: usb@ff500000 {
+                               compatible = "amlogic,meson-a1-usb", "snps,dwc2";
+                               reg = <0x0 0xff500000 0x0 0x40000>;
+                               interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
+                               phys = <&usb2_phy1>;
+                               phy-names = "usb2-phy";
+                               clocks = <&clkc_periphs CLKID_USB_PHY>;
+                               clock-names = "otg";
+                               dr_mode = "peripheral";
+                               g-rx-fifo-size = <192>;
+                               g-np-tx-fifo-size = <128>;
+                               g-tx-fifo-size = <128 128 16 16 16>;
+                       };
+               };
+
                gic: interrupt-controller@ff901000 {
                        compatible = "arm,gic-400";
                        reg = <0x0 0xff901000 0x0 0x1000>,