};
 };
 
+&adc {
+       clocks = <&clock CLK_TSADC>;
+       clock-names = "adc";
+       samsung,syscon-phandle = <&pmu_system_controller>;
+};
+
 &arm_a15_pmu {
        interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
        status = "okay";
 
                        status = "disabled";
                };
 
-               adc: adc@12d10000 {
-                       compatible = "samsung,exynos-adc-v2";
-                       reg = <0x12D10000 0x100>;
-                       interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&clock CLK_TSADC>;
-                       clock-names = "adc";
-                       #io-channel-cells = <1>;
-                       io-channel-ranges;
-                       samsung,syscon-phandle = <&pmu_system_controller>;
-                       status = "disabled";
-               };
-
                hsi2c_8: i2c@12e00000 {
                        compatible = "samsung,exynos5250-hsi2c";
                        reg = <0x12E00000 0x1000>;
        };
 };
 
+&adc {
+       clocks = <&clock CLK_TSADC>;
+       clock-names = "adc";
+       samsung,syscon-phandle = <&pmu_system_controller>;
+};
+
 &dp {
        clocks = <&clock CLK_DP1>;
        clock-names = "dp";
 
                        interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
                };
 
+               adc: adc@12d10000 {
+                       compatible = "samsung,exynos-adc-v2";
+                       reg = <0x12d10000 0x100>;
+                       interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+                       #io-channel-cells = <1>;
+                       io-channel-ranges;
+                       status = "disabled";
+               };
+
                /* i2c_0-3 are defined in exynos5.dtsi */
                hsi2c_4: i2c@12ca0000 {
                        compatible = "samsung,exynos5250-hsi2c";