+#include "juno-clocks.dtsi"
+
+/ {
        /*
         *  Devices shared by all Juno boards
         */
                };
        };
 
-       /include/ "juno-clocks.dtsi"
-
        smmu_dma: iommu@7fb00000 {
                compatible = "arm,mmu-401", "arm,smmu-v1";
                reg = <0x0 0x7fb00000 0x0 0x10000>;
                interrupt-map-mask = <0 0>;
                interrupt-map = <0 0 &gic 0 0 0 168 IRQ_TYPE_LEVEL_HIGH>;
        };
+};
 
  * This file is licensed under a dual GPLv2 or BSD license.
  *
  */
-
+/ {
        /* SoC fixed clocks */
        soc_uartclk: refclk7273800hz {
                compatible = "fixed-clock";
                clock-frequency = <400000000>;
                clock-output-names = "faxi_clk";
        };
+};
 
 /dts-v1/;
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include "juno-base.dtsi"
 
 / {
        model = "ARM Juno development board (r1)";
                                     <&A53_2>,
                                     <&A53_3>;
        };
-
-       #include "juno-base.dtsi"
 };
 
 &memtimer {
 
 /dts-v1/;
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include "juno-base.dtsi"
 
 / {
        model = "ARM Juno development board (r2)";
                                     <&A53_2>,
                                     <&A53_3>;
        };
-
-       #include "juno-base.dtsi"
 };
 
 &memtimer {
 
 /dts-v1/;
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include "juno-base.dtsi"
 
 / {
        model = "ARM Juno development board (r0)";
                                     <&A53_2>,
                                     <&A53_3>;
        };
-
-       #include "juno-base.dtsi"
 };
 
 &etm0 {