static void rtw89_init_vht_cap(struct rtw89_dev *rtwdev,
                               struct ieee80211_sta_vht_cap *vht_cap)
 {
-       static const __le16 highest[RF_PATH_MAX] = {
+       static const __le16 highest_bw80[RF_PATH_MAX] = {
                cpu_to_le16(433), cpu_to_le16(867), cpu_to_le16(1300), cpu_to_le16(1733),
        };
+       static const __le16 highest_bw160[RF_PATH_MAX] = {
+               cpu_to_le16(867), cpu_to_le16(1733), cpu_to_le16(2600), cpu_to_le16(3467),
+       };
+       const struct rtw89_chip_info *chip = rtwdev->chip;
+       const __le16 *highest = chip->support_bw160 ? highest_bw160 : highest_bw80;
        struct rtw89_hal *hal = &rtwdev->hal;
        u16 tx_mcs_map = 0, rx_mcs_map = 0;
        u8 sts_cap = 3;
        vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
                        IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE;
        vht_cap->cap |= sts_cap << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT;
+       if (chip->support_bw160)
+               vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ |
+                               IEEE80211_VHT_CAP_SHORT_GI_160;
        vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(rx_mcs_map);
        vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(tx_mcs_map);
        vht_cap->vht_mcs.rx_highest = highest[hal->rx_nss - 1];
                        mac_cap_info[5] = IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX;
                phy_cap_info[0] = IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G |
                                  IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G;
+               if (chip->support_bw160)
+                       phy_cap_info[0] |= IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
                phy_cap_info[1] = IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
                                  IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD |
                                  IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US;
                phy_cap_info[8] = IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI |
                                  IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI |
                                  IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_996;
+               if (chip->support_bw160)
+                       phy_cap_info[8] |= IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
+                                          IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU;
                phy_cap_info[9] = IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM |
                                  IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU |
                                  IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
                        phy_cap_info[9] |= IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU;
                he_cap->he_mcs_nss_supp.rx_mcs_80 = cpu_to_le16(mcs_map);
                he_cap->he_mcs_nss_supp.tx_mcs_80 = cpu_to_le16(mcs_map);
+               if (chip->support_bw160) {
+                       he_cap->he_mcs_nss_supp.rx_mcs_160 = cpu_to_le16(mcs_map);
+                       he_cap->he_mcs_nss_supp.tx_mcs_160 = cpu_to_le16(mcs_map);
+               }
 
                idx++;
        }