int __must_check i915_gem_init(struct drm_device *dev);
 int i915_gem_init_engines(struct drm_device *dev);
 int __must_check i915_gem_init_hw(struct drm_device *dev);
-int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice);
 void i915_gem_init_swizzling(struct drm_device *dev);
 void i915_gem_cleanup_engines(struct drm_device *dev);
 int __must_check i915_gpu_idle(struct drm_device *dev);
 
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
        struct intel_engine_cs *engine;
-       int ret, j;
+       int ret;
 
        if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt())
                return -EIO;
                        break;
                }
 
-               if (engine->id == RCS) {
-                       for (j = 0; j < NUM_L3_SLICES(dev); j++) {
-                               ret = i915_gem_l3_remap(req, j);
-                               if (ret)
-                                       goto err_request;
-                       }
-               }
-
                ret = i915_ppgtt_init_ring(req);
                if (ret)
                        goto err_request;
 
        return ret;
 }
 
-int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice)
+static int remap_l3(struct drm_i915_gem_request *req, int slice)
 {
        u32 *remap_info = req->i915->l3_parity.remap_info[slice];
        struct intel_engine_cs *engine = req->engine;
                if (!(to->remap_slice & (1<<i)))
                        continue;
 
-               ret = i915_gem_l3_remap(req, i);
+               ret = remap_l3(req, i);
                if (ret)
                        return ret;