struct can_frame *cf, u32 reg_esr)
 {
        struct flexcan_priv *priv = netdev_priv(dev);
-       int rx_errors = 0, tx_errors = 0;
+       bool rx_errors = false, tx_errors = false;
 
        cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
 
        if (reg_esr & FLEXCAN_ESR_BIT1_ERR) {
                netdev_dbg(dev, "BIT1_ERR irq\n");
                cf->data[2] |= CAN_ERR_PROT_BIT1;
-               tx_errors = 1;
+               tx_errors = true;
        }
        if (reg_esr & FLEXCAN_ESR_BIT0_ERR) {
                netdev_dbg(dev, "BIT0_ERR irq\n");
                cf->data[2] |= CAN_ERR_PROT_BIT0;
-               tx_errors = 1;
+               tx_errors = true;
        }
        if (reg_esr & FLEXCAN_ESR_ACK_ERR) {
                netdev_dbg(dev, "ACK_ERR irq\n");
                cf->can_id |= CAN_ERR_ACK;
                cf->data[3] = CAN_ERR_PROT_LOC_ACK;
-               tx_errors = 1;
+               tx_errors = true;
        }
        if (reg_esr & FLEXCAN_ESR_CRC_ERR) {
                netdev_dbg(dev, "CRC_ERR irq\n");
                cf->data[2] |= CAN_ERR_PROT_BIT;
                cf->data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;
-               rx_errors = 1;
+               rx_errors = true;
        }
        if (reg_esr & FLEXCAN_ESR_FRM_ERR) {
                netdev_dbg(dev, "FRM_ERR irq\n");
                cf->data[2] |= CAN_ERR_PROT_FORM;
-               rx_errors = 1;
+               rx_errors = true;
        }
        if (reg_esr & FLEXCAN_ESR_STF_ERR) {
                netdev_dbg(dev, "STF_ERR irq\n");
                cf->data[2] |= CAN_ERR_PROT_STUFF;
-               rx_errors = 1;
+               rx_errors = true;
        }
 
        priv->can.can_stats.bus_error++;