]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
arm64: dts: qcom: x1e001de-devkit: Enable support for both Type-A USB ports
authorAbel Vesa <abel.vesa@linaro.org>
Mon, 24 Mar 2025 14:08:19 +0000 (16:08 +0200)
committerBjorn Andersson <andersson@kernel.org>
Wed, 14 May 2025 20:28:46 +0000 (21:28 +0100)
The Qualcomm X Elite Devkit has 2 USB-A ports, both connected to the USB
multiport controller, each one via a separate NXP PTN3222 eUSB2-to-USB2
redriver to the eUSB2 PHY for High-Speed support, with a dedicated QMP
PHY for SuperSpeed support.

Describe each redriver and then enable each pair of PHYs and the
USB controller itself, in order to enable support for the 2 USB-A ports.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250324-x1e001de-devkit-dts-enable-usb-a-ports-v1-1-81153b2d1edf@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/x1e001de-devkit.dts

index 86b2129600ed4e639adfea0f56188b45c2747455..2d9627e6c7983daedba87619ba01074ee22b43c9 100644 (file)
        };
 };
 
+&i2c5 {
+       clock-frequency = <400000>;
+
+       status = "okay";
+
+       eusb3_repeater: redriver@47 {
+               compatible = "nxp,ptn3222";
+               reg = <0x47>;
+               #phy-cells = <0>;
+
+               vdd3v3-supply = <&vreg_l13b_3p0>;
+               vdd1v8-supply = <&vreg_l4b_1p8>;
+
+               reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
+
+               pinctrl-0 = <&eusb3_reset_n>;
+               pinctrl-names = "default";
+       };
+
+       eusb6_repeater: redriver@4f {
+               compatible = "nxp,ptn3222";
+               reg = <0x4f>;
+               #phy-cells = <0>;
+
+               vdd3v3-supply = <&vreg_l13b_3p0>;
+               vdd1v8-supply = <&vreg_l4b_1p8>;
+
+               reset-gpios = <&tlmm 184 GPIO_ACTIVE_LOW>;
+
+               pinctrl-0 = <&eusb6_reset_n>;
+               pinctrl-names = "default";
+       };
+};
+
 &i2c7 {
        clock-frequency = <400000>;
 
 &tlmm {
        gpio-reserved-ranges = <44 4>; /* SPI (TPM) */
 
+       eusb3_reset_n: eusb3-reset-n-state {
+               pins = "gpio6";
+               function = "gpio";
+               drive-strength = <2>;
+               bias-disable;
+               output-low;
+       };
+
+       eusb6_reset_n: eusb6-reset-n-state {
+               pins = "gpio184";
+               function = "gpio";
+               drive-strength = <2>;
+               bias-disable;
+               output-low;
+       };
+
        nvme_reg_en: nvme-reg-en-state {
                pins = "gpio18";
                function = "gpio";
 &usb_1_ss2_qmpphy_out {
        remote-endpoint = <&retimer_ss2_ss_in>;
 };
+
+&usb_mp {
+       status = "okay";
+};
+
+&usb_mp_hsphy0 {
+       vdd-supply = <&vreg_l2e_0p8>;
+       vdda12-supply = <&vreg_l3e_1p2>;
+
+       phys = <&eusb6_repeater>;
+
+       status = "okay";
+};
+
+&usb_mp_hsphy1 {
+       vdd-supply = <&vreg_l2e_0p8>;
+       vdda12-supply = <&vreg_l3e_1p2>;
+
+       phys = <&eusb3_repeater>;
+
+       status = "okay";
+};
+
+&usb_mp_qmpphy0 {
+       vdda-phy-supply = <&vreg_l3e_1p2>;
+       vdda-pll-supply = <&vreg_l3c_0p8>;
+
+       status = "okay";
+};
+
+&usb_mp_qmpphy1 {
+       vdda-phy-supply = <&vreg_l3e_1p2>;
+       vdda-pll-supply = <&vreg_l3c_0p8>;
+
+       status = "okay";
+};