arm64/hwcap: Add support for SVE 2.1

FEAT_SVE2p1 introduces a number of new SVE instructions. Since there is no
new architectural state added kernel support is simply a new hwcap which
lets userspace know that the feature is supported.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20221017152520.1039165-6-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/Documentation/arm64/elf_hwcaps.rst b/Documentation/arm64/elf_hwcaps.rst
index a82b2cdff680a7733f23efdc7d684f5d2df88986..6fed84f935dfed57f2227a05ce99dce56b90db6b 100644 (file)
--- a/Documentation/arm64/elf_hwcaps.rst
+++ b/Documentation/arm64/elf_hwcaps.rst
@@ -281,6 +281,9 @@ HWCAP2_CSSC
 HWCAP2_RPRFM
     Functionality implied by ID_AA64ISAR2_EL1.RPRFM == 0b0001.
 
+HWCAP2_SVE2P1
+    Functionality implied by ID_AA64ZFR0_EL1.SVEver == 0b0010.
+
 4. Unused AT_HWCAP bits
 -----------------------
 

diff --git a/Documentation/arm64/sve.rst b/Documentation/arm64/sve.rst
index f338ee2df46d145b959b430a32246b8839fd60c0..c7a356bf4e8f824fffb38dfaf7307d5e503549ff 100644 (file)
--- a/Documentation/arm64/sve.rst
+++ b/Documentation/arm64/sve.rst
@@ -52,6 +52,7 @@ model features for SVE is included in Appendix A.
        HWCAP2_SVEBITPERM
        HWCAP2_SVESHA3
        HWCAP2_SVESM4
+       HWCAP2_SVE2P1
 
   This list may be extended over time as the SVE architecture evolves.
 

diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h
index 605ec55cee7077335b008f7eb1e1ab1d0a6005c1..06dd12c514e61cdc6824aa0cc55278408f2c50a7 100644 (file)
--- a/arch/arm64/include/asm/hwcap.h
+++ b/arch/arm64/include/asm/hwcap.h
@@ -122,6 +122,7 @@
 #define KERNEL_HWCAP_SVE_EBF16         __khwcap2_feature(SVE_EBF16)
 #define KERNEL_HWCAP_CSSC              __khwcap2_feature(CSSC)
 #define KERNEL_HWCAP_RPRFM             __khwcap2_feature(RPRFM)
+#define KERNEL_HWCAP_SVE2P1            __khwcap2_feature(SVE2P1)
 
 /*
  * This yields a mask that user programs can use to figure out what

diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/asm/hwcap.h
index 063cc6ea560f3bc57494e72f2d8fc92a05c7de51..b713d30544f139211bd619680daf6fa3f452b645 100644 (file)
--- a/arch/arm64/include/uapi/asm/hwcap.h
+++ b/arch/arm64/include/uapi/asm/hwcap.h
@@ -95,5 +95,6 @@
 #define HWCAP2_SVE_EBF16       (1UL << 33)
 #define HWCAP2_CSSC            (1UL << 34)
 #define HWCAP2_RPRFM           (1UL << 35)
+#define HWCAP2_SVE2P1          (1UL << 36)
 
 #endif /* _UAPI__ASM_HWCAP_H */

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 6e0837212e97f329a311d38e1f93cf1c6dda8fc4..3e3af6b8cc854eabb9f006cb260e5efa3b3ff8fa 100644 (file)
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -2791,6 +2791,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
        HWCAP_CAP(SYS_ID_AA64MMFR2_EL1, ID_AA64MMFR2_EL1_AT_SHIFT, 4, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_USCAT),
 #ifdef CONFIG_ARM64_SVE
        HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_EL1_SVE_SHIFT, 4, FTR_UNSIGNED, ID_AA64PFR0_EL1_SVE_IMP, CAP_HWCAP, KERNEL_HWCAP_SVE),
+       HWCAP_CAP(SYS_ID_AA64ZFR0_EL1, ID_AA64ZFR0_EL1_SVEver_SHIFT, 4, FTR_UNSIGNED, ID_AA64ZFR0_EL1_SVEver_SVE2p1, CAP_HWCAP, KERNEL_HWCAP_SVE2P1),
        HWCAP_CAP(SYS_ID_AA64ZFR0_EL1, ID_AA64ZFR0_EL1_SVEver_SHIFT, 4, FTR_UNSIGNED, ID_AA64ZFR0_EL1_SVEver_SVE2, CAP_HWCAP, KERNEL_HWCAP_SVE2),
        HWCAP_CAP(SYS_ID_AA64ZFR0_EL1, ID_AA64ZFR0_EL1_AES_SHIFT, 4, FTR_UNSIGNED, ID_AA64ZFR0_EL1_AES_IMP, CAP_HWCAP, KERNEL_HWCAP_SVEAES),
        HWCAP_CAP(SYS_ID_AA64ZFR0_EL1, ID_AA64ZFR0_EL1_AES_SHIFT, 4, FTR_UNSIGNED, ID_AA64ZFR0_EL1_AES_PMULL128, CAP_HWCAP, KERNEL_HWCAP_SVEPMULL),

diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index 85108832d86ee07ca38496c0757701780148ebac..379695262b77ede7e8fa568ce8d437e300582de6 100644 (file)
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -118,6 +118,7 @@ static const char *const hwcap_str[] = {
        [KERNEL_HWCAP_SVE_EBF16]        = "sveebf16",
        [KERNEL_HWCAP_CSSC]             = "cssc",
        [KERNEL_HWCAP_RPRFM]            = "rprfm",
+       [KERNEL_HWCAP_SVE2P1]           = "sve2p1",
 };
 
 #ifdef CONFIG_COMPAT

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index a2b2e4c1c3f26c7a0ee1545095e37e1b9f132c4e..b2782b8faa01c38e2a70661b7becfff70935a8ad 100644 (file)
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -210,6 +210,7 @@ EndEnum
 Enum   3:0     SVEver
        0b0000  IMP
        0b0001  SVE2
+       0b0010  SVE2p1
 EndEnum
 EndSysreg