]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
drm/nouveau/pmu/gm200-: use alternate falcon reset sequence
authorBen Skeggs <bskeggs@redhat.com>
Thu, 25 Feb 2021 04:54:59 +0000 (14:54 +1000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 23 Feb 2022 11:00:56 +0000 (12:00 +0100)
commit 4cdd2450bf739bada353e82d27b00db9af8c3001 upstream.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Link: https://gitlab.freedesktop.org/drm/nouveau/-/merge_requests/10
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/nouveau/nvkm/falcon/base.c
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm200.c
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.c
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h

index c6a3448180d6fdb9102026bbbd17bffad1ca1775..93d9575181c67f7ae01203ff9b34e3c91e3cc6ec 100644 (file)
@@ -119,8 +119,12 @@ nvkm_falcon_disable(struct nvkm_falcon *falcon)
 int
 nvkm_falcon_reset(struct nvkm_falcon *falcon)
 {
-       nvkm_falcon_disable(falcon);
-       return nvkm_falcon_enable(falcon);
+       if (!falcon->func->reset) {
+               nvkm_falcon_disable(falcon);
+               return nvkm_falcon_enable(falcon);
+       }
+
+       return falcon->func->reset(falcon);
 }
 
 int
index 383376addb41c4a55dd1261ea65c748c846233fa..a9d6c36195ed1f175cdb83b32f203b8695302f72 100644 (file)
  */
 #include "priv.h"
 
+static int
+gm200_pmu_flcn_reset(struct nvkm_falcon *falcon)
+{
+       struct nvkm_pmu *pmu = container_of(falcon, typeof(*pmu), falcon);
+
+       nvkm_falcon_wr32(falcon, 0x014, 0x0000ffff);
+       pmu->func->reset(pmu);
+       return nvkm_falcon_enable(falcon);
+}
+
+const struct nvkm_falcon_func
+gm200_pmu_flcn = {
+       .debug = 0xc08,
+       .fbif = 0xe00,
+       .load_imem = nvkm_falcon_v1_load_imem,
+       .load_dmem = nvkm_falcon_v1_load_dmem,
+       .read_dmem = nvkm_falcon_v1_read_dmem,
+       .bind_context = nvkm_falcon_v1_bind_context,
+       .wait_for_halt = nvkm_falcon_v1_wait_for_halt,
+       .clear_interrupt = nvkm_falcon_v1_clear_interrupt,
+       .set_start_addr = nvkm_falcon_v1_set_start_addr,
+       .start = nvkm_falcon_v1_start,
+       .enable = nvkm_falcon_v1_enable,
+       .disable = nvkm_falcon_v1_disable,
+       .reset = gm200_pmu_flcn_reset,
+       .cmdq = { 0x4a0, 0x4b0, 4 },
+       .msgq = { 0x4c8, 0x4cc, 0 },
+};
+
 static const struct nvkm_pmu_func
 gm200_pmu = {
-       .flcn = &gt215_pmu_flcn,
+       .flcn = &gm200_pmu_flcn,
        .enabled = gf100_pmu_enabled,
        .reset = gf100_pmu_reset,
 };
index 8f6ed5373ea16e046a7748717639a304ac1327f9..7938722b4da17df0fdd580b7aeb64d890ef2cf04 100644 (file)
@@ -211,7 +211,7 @@ gm20b_pmu_recv(struct nvkm_pmu *pmu)
 
 static const struct nvkm_pmu_func
 gm20b_pmu = {
-       .flcn = &gt215_pmu_flcn,
+       .flcn = &gm200_pmu_flcn,
        .enabled = gf100_pmu_enabled,
        .intr = gt215_pmu_intr,
        .recv = gm20b_pmu_recv,
index 3d8ce14dba7bf1fb2b7a1d4c54dd9ced9f2f6ed0..3dfb3e8522f6a096aaa90fddcf5a79e2e05ec8a6 100644 (file)
@@ -39,7 +39,7 @@ gp102_pmu_enabled(struct nvkm_pmu *pmu)
 
 static const struct nvkm_pmu_func
 gp102_pmu = {
-       .flcn = &gt215_pmu_flcn,
+       .flcn = &gm200_pmu_flcn,
        .enabled = gp102_pmu_enabled,
        .reset = gp102_pmu_reset,
 };
index 9c237c426599b543e38f39e3d2fd3888bb70e510..7f5f9d5448360a69b5d9a5f832690c88233c593d 100644 (file)
@@ -78,7 +78,7 @@ gp10b_pmu_acr = {
 
 static const struct nvkm_pmu_func
 gp10b_pmu = {
-       .flcn = &gt215_pmu_flcn,
+       .flcn = &gm200_pmu_flcn,
        .enabled = gf100_pmu_enabled,
        .intr = gt215_pmu_intr,
        .recv = gm20b_pmu_recv,
index 276b6d778e532fc54b0049833ddb88d498c6f21e..b945ec320cd2ef15fa1e5749d6425c4c30d7dd4d 100644 (file)
@@ -44,6 +44,8 @@ void gf100_pmu_reset(struct nvkm_pmu *);
 
 void gk110_pmu_pgob(struct nvkm_pmu *, bool);
 
+extern const struct nvkm_falcon_func gm200_pmu_flcn;
+
 void gm20b_pmu_acr_bld_patch(struct nvkm_acr *, u32, s64);
 void gm20b_pmu_acr_bld_write(struct nvkm_acr *, u32, struct nvkm_acr_lsfw *);
 int gm20b_pmu_acr_boot(struct nvkm_falcon *);