return 0;
}
+int smu_set_xgmi_plpd_mode(struct smu_context *smu,
+ enum pp_xgmi_plpd_mode mode)
+{
+ int ret = -EOPNOTSUPP;
+
+ if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
+ return ret;
+
+ /* PLPD policy is not supported if it's NONE */
+ if (smu->plpd_mode == XGMI_PLPD_NONE)
+ return ret;
+
+ if (smu->plpd_mode == mode)
+ return 0;
+
+ if (smu->ppt_funcs && smu->ppt_funcs->select_xgmi_plpd_policy)
+ ret = smu->ppt_funcs->select_xgmi_plpd_policy(smu, mode);
+
+ if (!ret)
+ smu->plpd_mode = mode;
+
+ return ret;
+}
+
static const struct amd_pm_funcs swsmu_pm_funcs = {
/* export for sysfs */
.set_fan_control_mode = smu_set_fan_control_mode,
*/
int (*allow_xgmi_power_down)(struct smu_context *smu, bool en);
+ /**
+ * @select_xgmi_plpd_policy: Select xgmi per-link power down policy.
+ */
+ int (*select_xgmi_plpd_policy)(struct smu_context *smu,
+ enum pp_xgmi_plpd_mode mode);
+
/**
* @update_pcie_parameters: Update and upload the system's PCIe
* capabilites to the SMU.
int smu_allow_xgmi_power_down(struct smu_context *smu, bool en);
+int smu_set_xgmi_plpd_mode(struct smu_context *smu,
+ enum pp_xgmi_plpd_mode mode);
+
int smu_get_entrycount_gfxoff(struct smu_context *smu, u64 *value);
int smu_get_residency_gfxoff(struct smu_context *smu, u32 *value);
__SMU_DUMMY_MAP(QueryValidMcaCount), \
__SMU_DUMMY_MAP(QueryValidMcaCeCount), \
__SMU_DUMMY_MAP(McaBankDumpDW), \
- __SMU_DUMMY_MAP(McaBankCeDumpDW),
+ __SMU_DUMMY_MAP(McaBankCeDumpDW), \
+ __SMU_DUMMY_MAP(SelectPLPDMode),
#undef __SMU_DUMMY_MAP
#define __SMU_DUMMY_MAP(type) SMU_MSG_##type
MSG_MAP(QueryValidMcaCeCount, PPSMC_MSG_QueryValidMcaCeCount, 0),
MSG_MAP(McaBankDumpDW, PPSMC_MSG_McaBankDumpDW, 0),
MSG_MAP(McaBankCeDumpDW, PPSMC_MSG_McaBankCeDumpDW, 0),
+ MSG_MAP(SelectPLPDMode, PPSMC_MSG_SelectPLPDMode, 0),
};
static const struct cmn2asic_mapping smu_v13_0_6_clk_map[SMU_CLK_COUNT] = {
.mca_get_ras_mca_idx_array = mca_smu_get_ras_mca_idx_array,
};
+static int smu_v13_0_6_select_xgmi_plpd_policy(struct smu_context *smu,
+ enum pp_xgmi_plpd_mode mode)
+{
+ struct amdgpu_device *adev = smu->adev;
+ int ret, param;
+
+ switch (mode) {
+ case XGMI_PLPD_DEFAULT:
+ param = PPSMC_PLPD_MODE_DEFAULT;
+ break;
+ case XGMI_PLPD_OPTIMIZED:
+ param = PPSMC_PLPD_MODE_OPTIMIZED;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ /* change xgmi per-link power down policy */
+ ret = smu_cmn_send_smc_msg_with_param(
+ smu, SMU_MSG_SelectPLPDMode, param, NULL);
+
+ if (ret)
+ dev_err(adev->dev,
+ "select xgmi per-link power down policy %d failed\n",
+ mode);
+
+ return ret;
+}
+
static const struct pptable_funcs smu_v13_0_6_ppt_funcs = {
/* init dpm */
.get_allowed_feature_mask = smu_v13_0_6_get_allowed_feature_mask,
.od_edit_dpm_table = smu_v13_0_6_usr_edit_dpm_table,
.set_df_cstate = smu_v13_0_6_set_df_cstate,
.allow_xgmi_power_down = smu_v13_0_6_allow_xgmi_power_down,
+ .select_xgmi_plpd_policy = smu_v13_0_6_select_xgmi_plpd_policy,
.log_thermal_throttling_event = smu_v13_0_6_log_thermal_throttling_event,
.get_pp_feature_mask = smu_cmn_get_pp_feature_mask,
.get_gpu_metrics = smu_v13_0_6_get_gpu_metrics,