ifeq ($(CONFIG_OF),y)
  
 -dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb \
 -      at91sam9263ek.dtb \
 -      at91sam9g20ek_2mmc.dtb \
 -      at91sam9g20ek.dtb \
 -      at91sam9g25ek.dtb \
 -      at91sam9m10g45ek.dtb \
 -      at91sam9n12ek.dtb \
 -      ethernut5.dtb \
 -      evk-pro3.dtb \
 -      kizbox.dtb \
 -      tny_a9260.dtb \
 -      tny_a9263.dtb \
 -      tny_a9g20.dtb \
 -      usb_a9260.dtb \
 -      usb_a9263.dtb \
 -      usb_a9g20.dtb
 +# Keep at91 dtb files sorted alphabetically for each SoC
 +# rm9200
 +dtb-$(CONFIG_ARCH_AT91) += at91rm9200ek.dtb
 +# sam9260
 +dtb-$(CONFIG_ARCH_AT91) += animeo_ip.dtb
 +dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb
 +dtb-$(CONFIG_ARCH_AT91) += ethernut5.dtb
 +dtb-$(CONFIG_ARCH_AT91) += evk-pro3.dtb
 +dtb-$(CONFIG_ARCH_AT91) += tny_a9260.dtb
 +dtb-$(CONFIG_ARCH_AT91) += usb_a9260.dtb
 +# sam9263
 +dtb-$(CONFIG_ARCH_AT91) += at91sam9263ek.dtb
 +dtb-$(CONFIG_ARCH_AT91) += tny_a9263.dtb
 +dtb-$(CONFIG_ARCH_AT91) += usb_a9263.dtb
 +# sam9g20
 +dtb-$(CONFIG_ARCH_AT91) += at91sam9g20ek.dtb
 +dtb-$(CONFIG_ARCH_AT91) += at91sam9g20ek_2mmc.dtb
 +dtb-$(CONFIG_ARCH_AT91) += kizbox.dtb
 +dtb-$(CONFIG_ARCH_AT91) += tny_a9g20.dtb
 +dtb-$(CONFIG_ARCH_AT91) += usb_a9g20.dtb
 +# sam9g45
 +dtb-$(CONFIG_ARCH_AT91) += at91sam9m10g45ek.dtb
 +dtb-$(CONFIG_ARCH_AT91) += pm9g45.dtb
 +# sam9n12
 +dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb
 +# sam9x5
 +dtb-$(CONFIG_ARCH_AT91) += at91sam9g15ek.dtb
 +dtb-$(CONFIG_ARCH_AT91) += at91sam9g25ek.dtb
 +dtb-$(CONFIG_ARCH_AT91) += at91sam9g35ek.dtb
 +dtb-$(CONFIG_ARCH_AT91) += at91sam9x25ek.dtb
 +dtb-$(CONFIG_ARCH_AT91) += at91sam9x35ek.dtb
 +
  dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
+ dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb
  dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
        dove-cubox.dtb \
        dove-dove-db.dtb
 
  
  static void exynos4_map_io(void);
  static void exynos5_map_io(void);
+ static void exynos5440_map_io(void);
  static void exynos4_init_clocks(int xtal);
  static void exynos5_init_clocks(int xtal);
 -static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 +static void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no);
  static int exynos_init(void);
  
  static struct cpu_table cpu_ids[] __initdata = {
                .idmask         = EXYNOS5_SOC_MASK,
                .map_io         = exynos5_map_io,
                .init_clocks    = exynos5_init_clocks,
 -              .init_uarts     = exynos_init_uarts,
                .init           = exynos_init,
                .name           = name_exynos5250,
+       }, {
+               .idcode         = EXYNOS5440_SOC_ID,
+               .idmask         = EXYNOS5_SOC_MASK,
+               .map_io         = exynos5440_map_io,
+               .init           = exynos_init,
+               .name           = name_exynos5440,
        },
  };
  
 
  #define EXYNOS5_PA_UART1              0x12C10000
  #define EXYNOS5_PA_UART2              0x12C20000
  #define EXYNOS5_PA_UART3              0x12C30000
 -#define EXYNOS5_SZ_UART                       SZ_256
  
+ #define EXYNOS5440_PA_UART0           0x000B0000
+ #define EXYNOS5440_PA_UART1           0x000C0000
+ #define EXYNOS5440_SZ_UART            SZ_256
+ 
  #define S3C_VA_UARTx(x)                       (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
  
  #endif /* __ASM_ARCH_MAP_H */
 
  #include <asm/mach/pci.h>
  #include <asm/mach/time.h>
  
- #include <plat/fpga-irq.h>
- 
  #include "common.h"
  
 -/* 
 +/* Base address to the AP system controller */
 +void __iomem *ap_syscon_base;
 +
 +/*
   * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx
   * is the (PA >> 12).
   *
        /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
        .atag_offset    = 0x100,
        .reserve        = integrator_reserve,
 -      .map_io         = ap_map_io,
 +      .map_io         = ap_map_io_atag,
-       .nr_irqs        = NR_IRQS_INTEGRATOR_AP,
        .init_early     = ap_init_early,
        .init_irq       = ap_init_irq,
        .handle_irq     = fpga_handle_irq,
 
        /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
        .atag_offset    = 0x100,
        .reserve        = integrator_reserve,
 -      .map_io         = intcp_map_io,
 +      .map_io         = intcp_map_io_atag,
-       .nr_irqs        = NR_IRQS_INTEGRATOR_CP,
        .init_early     = intcp_init_early,
        .init_irq       = intcp_init_irq,
        .handle_irq     = fpga_handle_irq,
 
  #include <linux/io.h>
  #include <linux/mfd/abx500/ab8500.h>
  #include <linux/platform_data/usb-musb-ux500.h>
 +#include <linux/platform_data/pinctrl-nomadik.h>
+ #include <linux/random.h>
  
  #include <asm/pmu.h>
  #include <asm/mach/map.h>
 
  
  void __init v2m_dt_init_early(void)
  {
-       struct device_node *node;
        u32 dt_hbi;
  
-       node = of_find_compatible_node(NULL, NULL, "arm,vexpress-sysreg");
-       v2m_sysreg_base = of_iomap(node, 0);
-       if (WARN_ON(!v2m_sysreg_base))
-               return;
+       vexpress_sysreg_of_early_init();
  
        /* Confirm board type against DT property, if available */
 -      if (of_property_read_u32(allnodes, "arm,hbi", &dt_hbi) == 0) {
 +      if (of_property_read_u32(of_allnodes, "arm,hbi", &dt_hbi) == 0) {
-               int site = v2m_get_master_site();
-               u32 id = readl(v2m_sysreg_base + (site == SYS_CFG_SITE_DB2 ?
-                               V2M_SYS_PROCID1 : V2M_SYS_PROCID0));
-               u32 hbi = id & SYS_PROCIDx_HBI_MASK;
+               u32 hbi = vexpress_get_hbi(VEXPRESS_SITE_MASTER);
  
                if (WARN_ON(dt_hbi != hbi))
                        pr_warning("vexpress: DT HBI (%x) is not matching "
 
        depends on OF && GPIOLIB
        select PINCTRL_SAMSUNG
  
 -config PINCTRL_MVEBU
 -      bool
 -      depends on ARCH_MVEBU
 -      select PINMUX
 -      select PINCONF
 -
 -config PINCTRL_DOVE
 -      bool
 -      select PINCTRL_MVEBU
 -
 -config PINCTRL_KIRKWOOD
 -      bool
 -      select PINCTRL_MVEBU
 -
 -config PINCTRL_ARMADA_370
 -      bool
 -      select PINCTRL_MVEBU
 -
 -config PINCTRL_ARMADA_XP
 -      bool
 -      select PINCTRL_MVEBU
+ config PINCTRL_EXYNOS5440
+       bool "Samsung EXYNOS5440 SoC pinctrl driver"
+       select PINMUX
+       select PINCONF
+ 
 +source "drivers/pinctrl/mvebu/Kconfig"
  
  source "drivers/pinctrl/spear/Kconfig"
  
 
  obj-$(CONFIG_PINCTRL_COH901)  += pinctrl-coh901.o
  obj-$(CONFIG_PINCTRL_SAMSUNG) += pinctrl-samsung.o
  obj-$(CONFIG_PINCTRL_EXYNOS4) += pinctrl-exynos.o
 -obj-$(CONFIG_PINCTRL_MVEBU)   += pinctrl-mvebu.o
 -obj-$(CONFIG_PINCTRL_DOVE)    += pinctrl-dove.o
 -obj-$(CONFIG_PINCTRL_KIRKWOOD)        += pinctrl-kirkwood.o
 -obj-$(CONFIG_PINCTRL_ARMADA_370) += pinctrl-armada-370.o
 -obj-$(CONFIG_PINCTRL_ARMADA_XP)  += pinctrl-armada-xp.o
+ obj-$(CONFIG_PINCTRL_EXYNOS5440)      += pinctrl-exynos5440.o
  obj-$(CONFIG_PINCTRL_XWAY)    += pinctrl-xway.o
  obj-$(CONFIG_PINCTRL_LANTIQ)  += pinctrl-lantiq.o