u32 nor_num;
        u32 clk_rate;
        unsigned int chip_base_addr; /* We may support two chips. */
+       bool has_second_chip;
 };
 
 static inline int is_vybrid_qspi(struct fsl_qspi *q)
        struct spi_nor *nor;
        struct mtd_info *mtd;
        int ret, i = 0;
-       bool has_second_chip = false;
        const struct of_device_id *of_id =
                        of_match_device(fsl_qspi_dt_ids, &pdev->dev);
 
                goto irq_failed;
 
        if (of_get_property(np, "fsl,qspi-has-second-chip", NULL))
-               has_second_chip = true;
+               q->has_second_chip = true;
 
        /* iterate the subnodes. */
        for_each_available_child_of_node(dev->of_node, np) {
                char modalias[40];
 
                /* skip the holes */
-               if (!has_second_chip)
+               if (!q->has_second_chip)
                        i *= 2;
 
                nor = &q->nor[i];
        return 0;
 
 last_init_failed:
-       for (i = 0; i < q->nor_num; i++)
+       for (i = 0; i < q->nor_num; i++) {
+               /* skip the holes */
+               if (!q->has_second_chip)
+                       i *= 2;
                mtd_device_unregister(&q->mtd[i]);
-
+       }
 irq_failed:
        clk_disable_unprepare(q->clk);
 clk_failed:
        struct fsl_qspi *q = platform_get_drvdata(pdev);
        int i;
 
-       for (i = 0; i < q->nor_num; i++)
+       for (i = 0; i < q->nor_num; i++) {
+               /* skip the holes */
+               if (!q->has_second_chip)
+                       i *= 2;
                mtd_device_unregister(&q->mtd[i]);
+       }
 
        /* disable the hardware */
        writel(QUADSPI_MCR_MDIS_MASK, q->iobase + QUADSPI_MCR);