/* IMPORTANT: this extra read transaction is required to
         * flush the posted write buffer. */
-       (void) ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
-                                PCIE_INTR_ENABLE_ADDRESS);
+       (void)ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
+                               PCIE_INTR_ENABLE_ADDRESS);
 }
 
 static void ath10k_pci_enable_legacy_irq(struct ath10k *ar)
 
        /* IMPORTANT: this extra read transaction is required to
         * flush the posted write buffer. */
-       (void) ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
-                                PCIE_INTR_ENABLE_ADDRESS);
+       (void)ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
+                               PCIE_INTR_ENABLE_ADDRESS);
 }
 
 static inline const char *ath10k_pci_get_irq_method(struct ath10k *ar)
                        goto done;
                }
 
-               if (buf != (u32) address) {
+               if (buf != (u32)address) {
                        ret = -EIO;
                        goto done;
                }
                 * Request CE to send caller-supplied data that
                 * was copied to bounce buffer to Target(!) address.
                 */
-               ret = ath10k_ce_send(ce_diag, NULL, (u32) ce_data,
+               ret = ath10k_ce_send(ce_diag, NULL, (u32)ce_data,
                                     nbytes, 0, 0);
                if (ret != 0)
                        goto done;
                        continue;
                }
 
-               pipe_info->buf_sz = (size_t) (attr->src_sz_max);
+               pipe_info->buf_sz = (size_t)(attr->src_sz_max);
        }
 
        return 0;