PCI: dwc/intel-gw: Move getting PCI_CAP_ID_EXP offset to intel_pcie_link_setup()

The PCI_CAP_ID_EXP offset is only needed by intel_pcie_link_setup(), so
let's retrieve it there and avoid storing the offset.

Link: https://lore.kernel.org/r/20200821035420.380495-38-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Dilip Kota <eswara.kota@linux.intel.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>

diff --git a/drivers/pci/controller/dwc/pcie-intel-gw.c b/drivers/pci/controller/dwc/pcie-intel-gw.c
index 6b102197a1b670daf90ca5b5aecc608255a3ef45..807e1fa1bd6f93a5a70c445a182bc3d384756203 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-intel-gw.c
+++ b/drivers/pci/controller/dwc/pcie-intel-gw.c
@@ -72,7 +72,6 @@ struct intel_pcie_port {
        struct clk              *core_clk;
        struct reset_control    *core_rst;
        struct phy              *phy;
-       u8                      pcie_cap_ofst;
 };
 
 static void pcie_update_bits(void __iomem *base, u32 ofs, u32 mask, u32 val)
@@ -132,7 +131,7 @@ static void intel_pcie_ltssm_disable(struct intel_pcie_port *lpp)
 static void intel_pcie_link_setup(struct intel_pcie_port *lpp)
 {
        u32 val;
-       u8 offset = lpp->pcie_cap_ofst;
+       u8 offset = dw_pcie_find_capability(&lpp->pci, PCI_CAP_ID_EXP);
 
        val = pcie_rc_cfg_rd(lpp, offset + PCI_EXP_LNKCAP);
        lpp->max_width = FIELD_GET(PCI_EXP_LNKCAP_MLW, val);
@@ -328,7 +327,6 @@ static void intel_pcie_turn_off(struct intel_pcie_port *lpp)
 
 static int intel_pcie_host_setup(struct intel_pcie_port *lpp)
 {
-       struct device *dev = lpp->pci.dev;
        int ret;
 
        intel_pcie_core_rst_assert(lpp);
@@ -346,17 +344,6 @@ static int intel_pcie_host_setup(struct intel_pcie_port *lpp)
                goto clk_err;
        }
 
-       if (!lpp->pcie_cap_ofst) {
-               ret = dw_pcie_find_capability(&lpp->pci, PCI_CAP_ID_EXP);
-               if (!ret) {
-                       ret = -ENXIO;
-                       dev_err(dev, "Invalid PCIe capability offset\n");
-                       goto app_init_err;
-               }
-
-               lpp->pcie_cap_ofst = ret;
-       }
-
        intel_pcie_rc_setup(lpp);
        ret = intel_pcie_app_logic_setup(lpp);
        if (ret)