Modifications for 1.1.6:
======================================================================
+* Fix I2C driver for PM826, CPU86, and TQM8260
+
+* Add configuration options for PM826 and CPU86 boards to boot either
+ from 8 bit ROM/flash or 64 bit flash.
+
* Fix/extend configuration for MicroSys CPU86 board
* Cleanup 405gp PCI support after PID#73 patch
# All boards can come with 50 MHz (default), 66MHz or 80MHz clock,
# but only 855 and 860 boards may come with FEC
# and 823 boards may have LCD support
-xtract = $(subst _L2,,$(subst _66MHz,,$(subst _80MHz,,$(subst _266MHz,,$(subst _300MHz,,$(subst _LCD,,$(subst _FEC,,$(subst _config,,$1))))))))
+xtract_8xx = $(subst _66MHz,,$(subst _80MHz,,$(subst _LCD,,$(subst _FEC,,$(subst _config,,$1)))))
FPS850L_config \
TQM823L_config \
TQM860L_FEC_config \
TQM860L_FEC_66MHz_config \
TQM860L_FEC_80MHz_config: unconfig
- @echo "Configuring for $(call xtract,$@) Board..." ; \
+ @echo "Configuring for $(call xtract_8xx,$@) Board..." ; \
cd ./include ; \
echo "ARCH = ppc" > config.mk ; \
echo "BOARD = tqm8xx" >>config.mk ; \
echo "#define CONFIG_NEC_NL6648BC20" >>include/config.h ; \
echo "... with LCD display" ; \
}
- @echo "#include <config_$(call xtract,$@).h>" >>include/config.h
+ @echo "#include <config_$(call xtract_8xx,$@).h>" >>include/config.h
TTTech_config: unconfig
@echo "Configuring for $@ Board..." ; \
OCRTC_config \
ORSG_config: unconfig
- @echo "Configuring for $(call xtract,$@) Board..." ; \
+ @echo "Configuring for $(@:_config=) Board..." ; \
cd ./include ; \
echo "ARCH = ppc" > config.mk ; \
echo "BOARD = ocrtc" >>config.mk ; \
#########################################################################
## MPC8260 Systems
#########################################################################
+xtract_82xx = $(subst _ROMBOOT,,$(subst _L2,,$(subst _266MHz,,$(subst _300MHz,,$(subst _config,,$1)))))
cogent_mpc8260_config: unconfig
@echo "Configuring for $(@:_config=) Board..." ; \
echo "CPU = mpc8260" >>config.mk ; \
echo "#include <config_$(@:_config=).h>" >config.h
-CPU86_config: unconfig
- @echo "Configuring for $(call xtract,$@) Board..." ; \
+CPU86_config \
+CPU86_ROMBOOT_config: unconfig
+ @echo "Configuring for $(call xtract_82xx,$@) Board..." ; \
cd ./include ; \
echo "ARCH = ppc" > config.mk ; \
echo "BOARD = cpu86" >>config.mk ; \
- echo "CPU = mpc8260" >>config.mk ;
+ echo "CPU = mpc8260" >>config.mk ; \
+ @if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
+ echo "CONFIG_BOOT_ROM = y" >> config.mk ; \
+ echo "... booting from 8-bit flash" ; \
+ else \
+ echo "CONFIG_BOOT_ROM = n" >> config.mk ; \
+ echo "... booting from 64-bit flash" ; \
+ fi; \
+ echo "export CONFIG_BOOT_ROM" >>config.mk;
@echo "/* Automatically generated - do not edit */" >include/config.h
- @echo "#include <config_$(call xtract,$@).h>" >>include/config.h
+ @echo "#include <config_$(call xtract_82xx,$@).h>" >>include/config.h
ep8260_config: unconfig
@echo "Configuring for $(@:_config=) Board..." ; \
echo "CPU = mpc8260" >>config.mk ; \
echo "#include <config_$(@:_config=).h>" >config.h
-PM826_config: unconfig
+PM826_config \
+PM826_ROMBOOT_config: unconfig
@echo "Configuring for $(@:_config=) Board..." ; \
cd ./include ; \
echo "ARCH = ppc" > config.mk ; \
echo "BOARD = pm826" >>config.mk ; \
echo "CPU = mpc8260" >>config.mk ; \
- echo "#include <config_$(@:_config=).h>" >config.h
+ if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
+ echo "CONFIG_BOOT_ROM = y" >>config.mk ; \
+ echo "... booting from 8-bit flash" ; \
+ else \
+ echo "CONFIG_BOOT_ROM = n" >>config.mk ; \
+ echo "... booting from 64-bit flash" ; \
+ fi; \
+ echo "export CONFIG_BOOT_ROM" >>config.mk; \
+ echo "#include <config_$(call xtract_82xx,$@).h>" >config.h
ppmc8260_config: unconfig
@echo "Configuring for $(@:_config=) Board..." ; \
TQM8260_config \
TQM8260_L2_config \
TQM8260_266MHz_config \
-TQM8260_300MHz_config \
-TQM8260_L2_266MHz_config: unconfig
- @echo "Configuring for $(call xtract,$@) Board..." ; \
+TQM8260_L2_266MHz_config \
+TQM8260_300MHz_config: unconfig
+ @echo "Configuring for $(call xtract_82xx,$@) Board..." ; \
cd ./include ; \
echo "ARCH = ppc" > config.mk ; \
echo "BOARD = tqm8260" >>config.mk ; \
{ echo "#define CONFIG_300MHz" >>include/config.h ; \
echo "... with 300MHz system clock" ; \
}
- @echo "#include <config_$(call xtract,$@).h>" >>include/config.h
+ @echo "#include <config_$(call xtract_82xx,$@).h>" >>include/config.h
#########################################################################
## 74xx/7xx Systems
# in RAM where ppcboot is loaded at for debugging.
#
-TEXT_BASE = 0xFF800000
+ifeq ($(CONFIG_BOOT_ROM),y)
+ TEXT_BASE := 0xFF800000
+ PLATFORM_CPPFLAGS += -DCONFIG_BOOT_ROM
+else
+ TEXT_BASE := 0xFF000000
+endif
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
#
-# (C) Copyright 2001
+# (C) Copyright 2001, 2002
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# PM826 boards
#
-# This should be equal to the CFG_FLASH_BASE define in config_PM826.h
-# for the "final" configuration, with ppcboot in flash, or the address
-# in RAM where ppcboot is loaded at for debugging.
+# This should be equal to the CFG_FLASH_BASE or
+# CFG_BOOTROM_BASE define in config_PM826.h
+# for the "final" configuration, with ppcboot
+# in flash, or the address in RAM where
+# ppcboot is loaded at for debugging.
#
-TEXT_BASE = 0x40000000
+
+ifeq ($(CONFIG_BOOT_ROM),y)
+ TEXT_BASE := 0x60000000
+ PLATFORM_CPPFLAGS += -DCONFIG_BOOT_ROM
+else
+ TEXT_BASE := 0x40000000
+endif
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
/* protect monitor and environment sectors
*/
+#ifndef CONFIG_BOOT_BOOTROM
+ /* If PPCBoot is booted from ROM the CFG_MONITOR_BASE > CFG_FLASH0_BASE
+ * but we shouldn't protect it.
+ */
+
+#ifndef CONFIG_BOOT_ROM
+ /* If PPCBoot is booted from ROM the CFG_MONITOR_BASE > CFG_FLASH0_BASE
+ * but we shouldn't protect it.
+ */
+
#if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
flash_protect (FLAG_PROTECT_SET,
CFG_MONITOR_BASE,
CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1, &flash_info[0]
);
#endif
+#endif
+#endif
#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
# ifndef CFG_ENV_SIZE
/* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */
/* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* PD17 */
/* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* PD16 */
- /* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* PD15 */
- /* PD14 */ { 0, 1, 1, 0, 1, 0 }, /* PD14 */
+#if defined(CONFIG_SOFT_I2C)
+ /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
+ /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
+#else
+#if defined(CONFIG_HARD_I2C)
+ /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
+ /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
+#else /* normal I/O port pins */
+ /* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SDA */
+ /* PD14 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SCL */
+#endif
+#endif
/* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
/* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
/* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
volatile immap_t * immap = (immap_t *)CFG_IMMR;
volatile memctl8260_t * memctl = &immap->im_memctl;
#ifndef CFG_RAMBOOT
- ulong size8, size9, psize = 32 * 1024 * 1024;
+ ulong size8, size9;
#endif
+ ulong psize = 32 * 1024 * 1024;
memctl->memc_psrt = CFG_PSRT;
memctl->memc_mptpr = CFG_MPTPR;
/* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
/* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
/* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
+#if defined(CONFIG_SOFT_I2C)
+ /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
+ /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
+#else
+#if defined(CONFIG_HARD_I2C)
+ /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
+ /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
+#else /* normal I/O port pins */
/* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SDA */
/* PD14 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SCL */
+#endif
+#endif
/* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
/* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
/* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
*/
int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
+ int shift;
PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len%d\n",
chip, addr, alen, buffer, len);
PRINTD("i2c_read, no chip responded %02X\n", chip);
return(1);
}
+ shift = (alen-1) * 8;
while(alen-- > 0) {
- if(write_byte(addr)) {
+ if(write_byte(addr >> shift)) {
PRINTD("i2c_read, address not <ACK>ed\n");
return(1);
}
- addr >>= 8;
+ shift -= 8;
}
send_stop(); /* reportedly some chips need a full stop */
send_start();
*/
int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
- int failures = 0;
+ int shift, failures = 0;
send_start();
if(write_byte(chip << 1)) { /* write cycle */
PRINTD("i2c_write, no chip responded %02X\n", chip);
return(1);
}
+ shift = (alen-1) * 8;
while(alen-- > 0) {
- if(write_byte(addr)) {
+ if(write_byte(addr >> shift)) {
PRINTD("i2c_write, address not <ACK>ed\n");
return(1);
}
- addr >>= 8;
+ shift -= 8;
}
while(len-- > 0) {
* Flash configuration
*/
-#define CONFIG_BOOT_BOOTROM /* BTMD jumpers are set to 1-2, 3-4 */
-
#define CFG_BOOTROM_BASE 0xFF800000
#define CFG_BOOTROM_SIZE 0x00080000
#define CFG_FLASH_BASE 0xFF000000
* defines for the various registers affected by the HRCW e.g. changing
* HRCW_DPPCxx requires you to also change CFG_SIUMCR.
*/
-#if defined(CONFIG_BOOT_BOOTROM)
+#if defined(CONFIG_BOOT_ROM)
#define CFG_HRCW_MASTER (HRCW_CIP | HRCW_ISB100 | HRCW_BMS | \
HRCW_BPS01 | HRCW_CS10PC01)
#else
#if 0
/* environment is in Flash */
#define CFG_ENV_IS_IN_FLASH 1
-#ifdef CONFIG_BOOT_BOOTROM
+#ifdef CONFIG_BOOT_ROM
# define CFG_ENV_ADDR (CFG_FLASH_BASE+0x70000)
# define CFG_ENV_SIZE 0x10000
# define CFG_ENV_SECT_SIZE 0x10000
#define CFG_MRS_OFFS 0x00000000
-#ifdef CONFIG_BOOT_BOOTROM
+#ifdef CONFIG_BOOT_ROM
/* Bank 0 - Boot ROM
*/
#define CFG_BR0_PRELIM ((CFG_BOOTROM_BASE & BRx_BA_MSK)|\
ORxG_SCY_3_CLK |\
ORxU_EHTR_8IDLE)
-#else /* CONFIG_BOOT_BOOTROM */
+#else /* CONFIG_BOOT_ROM */
/* Bank 0 - FLASH
*/
#define CFG_BR0_PRELIM ((CFG_FLASH_BASE & BRx_BA_MSK) |\
ORxG_SCY_3_CLK |\
ORxU_EHTR_8IDLE)
-#endif /* CONFIG_BOOT_BOOTROM */
+#endif /* CONFIG_BOOT_ROM */
/* Bank 2 - 60x bus SDRAM
/*
* Software (bit-bang) I2C driver configuration
*/
-#define I2C_PORT 1 /* Port A=0, B=1, C=2, D=3 */
-#define I2C_ACTIVE (iop->pdir |= 0x00000010)
-#define I2C_TRISTATE (iop->pdir &= ~0x00000010)
-#define I2C_READ ((iop->pdat & 0x00000010) != 0)
-#define I2C_SDA(bit) if(bit) iop->pdat |= 0x00000010; \
- else iop->pdat &= ~0x00000010
-#define I2C_SCL(bit) if(bit) iop->pdat |= 0x00000020; \
- else iop->pdat &= ~0x00000020
-#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
+#define I2C_PORT 3 /* Port A=0, B=1, C=2, D=3 */
+#define I2C_ACTIVE (iop->pdir |= 0x00010000)
+#define I2C_TRISTATE (iop->pdir &= ~0x00010000)
+#define I2C_READ ((iop->pdat & 0x00010000) != 0)
+#define I2C_SDA(bit) if(bit) iop->pdat |= 0x00010000; \
+ else iop->pdat &= ~0x00010000
+#define I2C_SCL(bit) if(bit) iop->pdat |= 0x00020000; \
+ else iop->pdat &= ~0x00020000
+#define I2C_DELAY udelay(10) /* 1/4 I2C clock duration */
#define CONFIG_RTC_PCF8563
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-
-/* What should the base address of the main FLASH be and how big is
- * it (in MBytes)? This must contain TEXT_BASE from board/tqm8260/config.mk
- * The main FLASH is whichever is connected to *CS0.
+/*-----------------------------------------------------------------------
+ * Flash and Boot ROM mapping
*/
-#define CFG_FLASH0_BASE 0x40000000
-#define CFG_FLASH0_SIZE 32
+
+#define CFG_BOOTROM_BASE 0x60000000
+#define CFG_BOOTROM_SIZE 0x00080000
+#define CFG_FLASH0_BASE 0x40000000
+#define CFG_FLASH0_SIZE 0x02000000
+
/* Flash bank size (for preliminary settings)
*/
/* Final version: environment in EEPROM */
#define CFG_ENV_IS_IN_EEPROM 1
#define CFG_I2C_EEPROM_ADDR 0x58
-#define CFG_I2C_EEPROM_ADDR_LEN 2
+#define CFG_I2C_EEPROM_ADDR_LEN 1
+#define CFG_EEPROM_PAGE_WRITE_BITS 4
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
#define CFG_ENV_OFFSET 0
#define CFG_ENV_SIZE 2048
#endif
* defines for the various registers affected by the HRCW e.g. changing
* HRCW_DPPCxx requires you to also change CFG_SIUMCR.
*/
+#if defined(CONFIG_BOOT_ROM)
+#define CFG_HRCW_MASTER (HRCW_BPS01 | HRCW_CIP | HRCW_ISB100 | HRCW_BMS)
+#else
#define CFG_HRCW_MASTER (HRCW_CIP | HRCW_ISB100 | HRCW_BMS)
+#endif
/* no slaves so just fill with zeros */
#define CFG_HRCW_SLAVE1 0
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/
+#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
+# define CFG_RAMBOOT
+#endif
+
/*
* Internal Definitions
*
#define CFG_MRS_OFFS 0x00000000
-/* Bank 0 - FLASH
+#if defined(CONFIG_BOOT_ROM)
+/*
+ * Bank 0 - BOOTROM
+ */
+#define CFG_BR0_PRELIM ((CFG_BOOTROM_BASE & BRx_BA_MSK)|\
+ BRx_PS_8 |\
+ BRx_MS_GPCM_P |\
+ BRx_V)
+
+#define CFG_OR0_PRELIM (P2SZ_TO_AM(CFG_BOOTROM_SIZE) |\
+ ORxG_CSNT |\
+ ORxG_ACS_DIV1 |\
+ ORxG_SCY_3_CLK |\
+ ORxG_EHTR |\
+ ORxG_TRLX)
+
+#define CFG_BR1_PRELIM ((CFG_FLASH_BASE & BRx_BA_MSK) |\
+ BRx_PS_64 |\
+ BRx_MS_GPCM_P |\
+ BRx_V)
+
+#define CFG_OR1_PRELIM (P2SZ_TO_AM(CFG_FLASH_SIZE) |\
+ ORxG_CSNT |\
+ ORxG_ACS_DIV1 |\
+ ORxG_SCY_3_CLK |\
+ ORxG_EHTR |\
+ ORxG_TRLX)
+
+#else /* ! CONFIG_BOOT_ROM */
+
+/*
+ * Bank 0 - FLASH
*/
#define CFG_BR0_PRELIM ((CFG_FLASH_BASE & BRx_BA_MSK) |\
BRx_PS_64 |\
BRx_MS_GPCM_P |\
BRx_V)
-#define CFG_OR0_PRELIM (MEG_TO_AM(CFG_FLASH_SIZE) |\
+#define CFG_OR0_PRELIM (P2SZ_TO_AM(CFG_FLASH_SIZE) |\
ORxG_CSNT |\
ORxG_ACS_DIV1 |\
ORxG_SCY_3_CLK |\
ORxG_EHTR |\
ORxG_TRLX)
-
+#endif /* CONFIG_BOOT_ROM */
/* Bank 2 - SDRAM
*/
else iop->pdat &= ~0x00020000
#define I2C_SCL(bit) if(bit) iop->pdat |= 0x00010000; \
else iop->pdat &= ~0x00010000
-#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
+#define I2C_DELAY udelay(20) /* 1/4 I2C clock duration */
#else
else iop->pdat &= ~0x00010000
#define I2C_SCL(bit) if(bit) iop->pdat |= 0x00020000; \
else iop->pdat &= ~0x00020000
-#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
+#define I2C_DELAY udelay(20) /* 1/4 I2C clock duration */
#endif
-# define CFG_I2C_EEPROM_ADDR 0x50
-# define CFG_I2C_EEPROM_ADDR_LEN 2
+#define CFG_I2C_EEPROM_ADDR 0x50
+#define CFG_I2C_EEPROM_ADDR_LEN 2
+#define CFG_EEPROM_PAGE_WRITE_BITS 4
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
+
+#define CONFIG_I2C_X
/*
* select serial console configuration