}
if (ibrs_inuse)
- native_wrmsrl(MSR_IA32_SPEC_CTRL, 0);
+ native_wrmsrl(MSR_IA32_SPEC_CTRL, SPEC_CTRL_FEATURE_DISABLE_IBRS);
__monitor((void *)¤t_thread_info()->flags, 0, 0);
if (!need_resched())
__mwait(eax, ecx);
if (ibrs_inuse)
- native_wrmsrl(MSR_IA32_SPEC_CTRL, FEATURE_ENABLE_IBRS);
+ native_wrmsrl(MSR_IA32_SPEC_CTRL, SPEC_CTRL_FEATURE_ENABLE_IBRS);
}
current_clr_polling();
}
pushq %rdx; \
movl $MSR_IA32_SPEC_CTRL, %ecx; \
movl $0, %edx; \
- movl $FEATURE_ENABLE_IBRS, %eax; \
+ movl $SPEC_CTRL_FEATURE_ENABLE_IBRS, %eax; \
wrmsr; \
popq %rdx; \
popq %rcx; \
#define __ASM_ENABLE_IBRS_CLOBBER \
movl $MSR_IA32_SPEC_CTRL, %ecx; \
movl $0, %edx; \
- movl $FEATURE_ENABLE_IBRS, %eax; \
+ movl $SPEC_CTRL_FEATURE_ENABLE_IBRS, %eax; \
wrmsr;
#define __ASM_DISABLE_IBRS \
pushq %rax; \
movl %eax, \save_reg
movl $0, %edx
- movl $FEATURE_ENABLE_IBRS, %eax
+ movl $SPEC_CTRL_FEATURE_ENABLE_IBRS, %eax
wrmsr
jmp 22f
12:
testl $SPEC_CTRL_IBRS_INUSE, use_ibrs
jz 13f
- cmpl $FEATURE_ENABLE_IBRS, \save_reg
+ cmpl $SPEC_CTRL_FEATURE_ENABLE_IBRS, \save_reg
je 13f
movl $MSR_IA32_SPEC_CTRL, %ecx
#define MSR_IA32_LASTINTFROMIP 0x000001dd
#define MSR_IA32_LASTINTTOIP 0x000001de
+#define SPEC_CTRL_FEATURE_DISABLE_IBRS (0 << 0)
+#define SPEC_CTRL_FEATURE_ENABLE_IBRS (1 << 0)
+
#define MSR_IA32_SPEC_CTRL 0x00000048
#define MSR_IA32_PRED_CMD 0x00000049
#define PACKAGE_THERM_INT_LOW_ENABLE (1 << 1)
#define PACKAGE_THERM_INT_PLN_ENABLE (1 << 24)
-#define FEATURE_ENABLE_IBRS (1<<0)
#define FEATURE_SET_IBPB (1<<0)
/* Thermal Thresholds Support */
}
if (boot_cpu_has(X86_FEATURE_SPEC_CTRL))
- native_wrmsrl(MSR_IA32_SPEC_CTRL, 0);
+ native_wrmsrl(MSR_IA32_SPEC_CTRL, SPEC_CTRL_FEATURE_DISABLE_IBRS);
__monitor((void *)¤t_thread_info()->flags, 0, 0);
if (!need_resched()) {
__sti_mwait(0, 0);
if (boot_cpu_has(X86_FEATURE_SPEC_CTRL))
native_wrmsrl(MSR_IA32_SPEC_CTRL,
- FEATURE_ENABLE_IBRS);
+ SPEC_CTRL_FEATURE_ENABLE_IBRS);
} else {
if (boot_cpu_has(X86_FEATURE_SPEC_CTRL))
- native_wrmsrl(MSR_IA32_SPEC_CTRL, FEATURE_ENABLE_IBRS);
+ native_wrmsrl(MSR_IA32_SPEC_CTRL, SPEC_CTRL_FEATURE_ENABLE_IBRS);
local_irq_enable();
}
trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
tboot_shutdown(TB_SHUTDOWN_WFS);
if (ibrs_inuse)
- native_wrmsrl(MSR_IA32_SPEC_CTRL, 0);
+ native_wrmsrl(MSR_IA32_SPEC_CTRL, SPEC_CTRL_FEATURE_DISABLE_IBRS);
mwait_play_dead(); /* Only returns on failure */
if (cpuidle_play_dead())
hlt_play_dead();
if (ibrs_inuse)
- native_wrmsrl(MSR_IA32_SPEC_CTRL, FEATURE_ENABLE_IBRS);
+ native_wrmsrl(MSR_IA32_SPEC_CTRL, SPEC_CTRL_FEATURE_ENABLE_IBRS);
}
#else /* ... !CONFIG_HOTPLUG_CPU */
local_irq_enable();
if (ibrs_inuse &&
- svm->spec_ctrl != FEATURE_ENABLE_IBRS)
+ svm->spec_ctrl != SPEC_CTRL_FEATURE_ENABLE_IBRS)
wrmsrl(MSR_IA32_SPEC_CTRL, svm->spec_ctrl);
asm volatile (
if (ibrs_inuse) {
rdmsrl(MSR_IA32_SPEC_CTRL, svm->spec_ctrl);
- if (svm->spec_ctrl != FEATURE_ENABLE_IBRS)
- wrmsrl(MSR_IA32_SPEC_CTRL, FEATURE_ENABLE_IBRS);
+ if (svm->spec_ctrl != SPEC_CTRL_FEATURE_ENABLE_IBRS)
+ wrmsrl(MSR_IA32_SPEC_CTRL, SPEC_CTRL_FEATURE_ENABLE_IBRS);
}
stuff_RSB();
vmx_set_interrupt_shadow(vcpu, 0);
if (ibpb_inuse &&
- vmx->spec_ctrl != FEATURE_ENABLE_IBRS)
+ vmx->spec_ctrl != SPEC_CTRL_FEATURE_ENABLE_IBRS)
wrmsrl(MSR_IA32_SPEC_CTRL, vmx->spec_ctrl);
atomic_switch_perf_msrs(vmx);
if (ibpb_inuse) {
rdmsrl(MSR_IA32_SPEC_CTRL, vmx->spec_ctrl);
if (vmx->spec_ctrl)
- wrmsrl(MSR_IA32_SPEC_CTRL, FEATURE_ENABLE_IBRS);
+ wrmsrl(MSR_IA32_SPEC_CTRL, SPEC_CTRL_FEATURE_ENABLE_IBRS);
}
stuff_RSB();
int smp_call_function_single_async(int cpu, struct call_single_data *csd);
#ifdef CONFIG_X86
+#include <asm/spec_ctrl.h>
/* indicate usage of IBRS to control execution speculation */
extern int use_ibrs;
extern u32 sysctl_ibrs_enabled;
set_ibrs_disabled();
if (ibrs_supported) {
for_each_online_cpu(cpu)
- wrmsrl_on_cpu(cpu, MSR_IA32_SPEC_CTRL, 0x0);
+ wrmsrl_on_cpu(cpu, MSR_IA32_SPEC_CTRL, SPEC_CTRL_FEATURE_DISABLE_IBRS);
}
} else if (sysctl_ibrs_enabled == 2) {
/* always set IBRS on, even in user space */
clear_ibrs_disabled();
if (ibrs_supported) {
for_each_online_cpu(cpu)
- wrmsrl_on_cpu(cpu, MSR_IA32_SPEC_CTRL, FEATURE_ENABLE_IBRS);
+ wrmsrl_on_cpu(cpu, MSR_IA32_SPEC_CTRL, SPEC_CTRL_FEATURE_ENABLE_IBRS);
} else {
sysctl_ibrs_enabled = 0;
}