Add NAND Flash controller node definition to the A10 SoC.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
                        #dma-cells = <2>;
                };
 
+               nfc: nand@01c03000 {
+                       compatible = "allwinner,sun4i-a10-nand";
+                       reg = <0x01c03000 0x1000>;
+                       interrupts = <37>;
+                       clocks = <&ahb_gates 13>, <&nand_clk>;
+                       clock-names = "ahb", "mod";
+                       dmas = <&dma SUN4I_DMA_DEDICATED 3>;
+                       dma-names = "rxtx";
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
                spi0: spi@01c05000 {
                        compatible = "allwinner,sun4i-a10-spi";
                        reg = <0x01c05000 0x1000>;