]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
x86/cpu/topology: Provide detect_extended_topology_early()
authorThomas Gleixner <tglx@linutronix.de>
Tue, 5 Jun 2018 22:55:39 +0000 (00:55 +0200)
committerKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Fri, 10 Aug 2018 22:56:36 +0000 (18:56 -0400)
To support force disabling of SMT it's required to know the number of
thread siblings early. detect_extended_topology() cannot be called before
the APIC driver is selected, so split out the part which initializes
smp_num_siblings.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Orabug: 28220674
CVE: CVE-2018-3620

(cherry picked from commit 95f3d39ccf7aaea79d1ffdac1c887c2e100ec1b6)

Signed-off-by: Mihai Carabas <mihai.carabas@oracle.com>
Reviewed-by: Darren Kenny <darren.kenny@oracle.com>
Conflicts:
arch/x86/kernel/cpu/cpu.h
arch/x86/kernel/cpu/topology.c
Contextual

arch/x86/include/asm/processor.h
arch/x86/kernel/cpu/cpu.h
arch/x86/kernel/cpu/topology.c

index 5537d70cfdc6fa47402cd0c45eda9c0724cb64e5..621b9346032b899505cbf546e66c9428b1ad7581 100644 (file)
@@ -190,7 +190,7 @@ extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c,
 extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
 extern void init_amd_cacheinfo(struct cpuinfo_x86 *c);
 
-extern void detect_extended_topology(struct cpuinfo_x86 *c);
+extern int detect_extended_topology(struct cpuinfo_x86 *c);
 extern void detect_ht(struct cpuinfo_x86 *c);
 
 #ifdef CONFIG_X86_32
index aff12c9cd2770cd957650433103382fc7c007e72..ca5d33321e7c77984c27342eba0b19557b3206f7 100644 (file)
@@ -46,6 +46,7 @@ extern const struct cpu_dev *const __x86_cpu_dev_start[],
 extern void get_cpu_cap(struct cpuinfo_x86 *c,
                        enum get_cpu_cap_behavior behavior);
 extern void cpu_detect_cache_sizes(struct cpuinfo_x86 *c);
+extern int detect_extended_topology_early(struct cpuinfo_x86 *c);
 extern int detect_ht_early(struct cpuinfo_x86 *c);
 extern void x86_spec_ctrl_setup_ap(void);
 
index 2c30e2cf1f1ab22485af06996513ce593938a09b..ad232ec8e61df0e81447fbdde5a004fe16602460 100644 (file)
 #define BITS_SHIFT_NEXT_LEVEL(eax)     ((eax) & 0x1f)
 #define LEVEL_MAX_SIBLINGS(ebx)                ((ebx) & 0xffff)
 
-/*
- * Check for extended topology enumeration cpuid leaf 0xb and if it
- * exists, use it for populating initial_apicid and cpu topology
- * detection.
- */
-void detect_extended_topology(struct cpuinfo_x86 *c)
+int detect_extended_topology_early(struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_SMP
-       unsigned int eax, ebx, ecx, edx, sub_index;
-       unsigned int ht_mask_width, core_plus_mask_width;
-       unsigned int core_select_mask, core_level_siblings;
+       unsigned int eax, ebx, ecx, edx;
+
 
        if (c->cpuid_level < 0xb)
-               return;
+               return -1;
 
        cpuid_count(0xb, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
 
@@ -42,7 +36,7 @@ void detect_extended_topology(struct cpuinfo_x86 *c)
         * check if the cpuid leaf 0xb is actually implemented.
         */
        if (ebx == 0 || (LEAFB_SUBTYPE(ecx) != SMT_TYPE))
-               return;
+               return -1;
 
        set_cpu_cap(c, X86_FEATURE_XTOPOLOGY);
 
@@ -50,10 +44,30 @@ void detect_extended_topology(struct cpuinfo_x86 *c)
         * initial apic id, which also represents 32-bit extended x2apic id.
         */
        c->initial_apicid = edx;
+       smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
+#endif
+       return 0;
+}
+
+/*
+ * Check for extended topology enumeration cpuid leaf 0xb and if it
+ * exists, use it for populating initial_apicid and cpu topology
+ * detection.
+ */
+int detect_extended_topology(struct cpuinfo_x86 *c)
+{
+#ifdef CONFIG_SMP
+       unsigned int eax, ebx, ecx, edx, sub_index;
+       unsigned int ht_mask_width, core_plus_mask_width;
+       unsigned int core_select_mask, core_level_siblings;
+
+       if (detect_extended_topology_early(c) < 0)
+               return -1;
 
        /*
         * Populate HT related information from sub-leaf level 0.
         */
+       cpuid_count(0xb, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
        core_level_siblings = smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
        core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
 
@@ -85,6 +99,6 @@ void detect_extended_topology(struct cpuinfo_x86 *c)
 
        c->x86_max_cores = (core_level_siblings / smp_num_siblings);
 
-       return;
 #endif
+       return 0;
 }