drm/915: Parsing the missed out DTD fields from the VBT

The upper bits of the vsync width, vsync offset and hsync width
were not parsed from the VBT. Parse these fields in this patch.

V2: Renamed lvds dvo timing structure members and code identation
fix (Jani's review comments)
V3: Corrected commit message, used "from the VBT"

Signed-off-by: Vincente Tsou <vincente.tsou@intel.com>
Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1482430993-3265-1-git-send-email-madhav.chauhan@intel.com

diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index a359defd5c5943b81162c28aaac6d2e478d04c4f..f6d37558301d36d51bb70fadf04d87d361465a0d 100644 (file)
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -114,16 +114,18 @@ fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
        panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
                ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
        panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
-               dvo_timing->hsync_pulse_width;
+               ((dvo_timing->hsync_pulse_width_hi << 8) |
+                       dvo_timing->hsync_pulse_width_lo);
        panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
                ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
 
        panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
                dvo_timing->vactive_lo;
        panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
-               dvo_timing->vsync_off;
+               ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
        panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
-               dvo_timing->vsync_pulse_width;
+               ((dvo_timing->vsync_pulse_width_hi << 4) |
+                       dvo_timing->vsync_pulse_width_lo);
        panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
                ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
        panel_fixed_mode->clock = dvo_timing->clock * 10;

diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
index 8886cab19f985abf7e70451c991a5a84c9a60adf..a92e7762f5964eb28c8cdd3ab80f8b44ffd55efa 100644 (file)
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -399,10 +399,12 @@ struct lvds_dvo_timing {
        u8 vblank_hi:4;
        u8 vactive_hi:4;
        u8 hsync_off_lo;
-       u8 hsync_pulse_width;
-       u8 vsync_pulse_width:4;
-       u8 vsync_off:4;
-       u8 rsvd0:6;
+       u8 hsync_pulse_width_lo;
+       u8 vsync_pulse_width_lo:4;
+       u8 vsync_off_lo:4;
+       u8 vsync_pulse_width_hi:2;
+       u8 vsync_off_hi:2;
+       u8 hsync_pulse_width_hi:2;
        u8 hsync_off_hi:2;
        u8 himage_lo;
        u8 vimage_lo;
@@ -414,7 +416,7 @@ struct lvds_dvo_timing {
        u8 digital:2;
        u8 vsync_positive:1;
        u8 hsync_positive:1;
-       u8 rsvd2:1;
+       u8 non_interlaced:1;
 } __packed;
 
 struct lvds_pnp_id {