switch (vm->mode) {
        case VM_MODE_P52V48_4K:
-               tcr_el1 |= 0ul << 14; /* TG0 = 4KB */
-               tcr_el1 |= 6ul << 32; /* IPS = 52 bits */
-               break;
+               TEST_ASSERT(false, "AArch64 does not support 4K sized pages "
+                                  "with 52-bit physical address ranges");
        case VM_MODE_P52V48_64K:
                tcr_el1 |= 1ul << 14; /* TG0 = 64KB */
                tcr_el1 |= 6ul << 32; /* IPS = 52 bits */
                break;
+       case VM_MODE_P48V48_4K:
+               tcr_el1 |= 0ul << 14; /* TG0 = 4KB */
+               tcr_el1 |= 5ul << 32; /* IPS = 48 bits */
+               break;
+       case VM_MODE_P48V48_64K:
+               tcr_el1 |= 1ul << 14; /* TG0 = 64KB */
+               tcr_el1 |= 5ul << 32; /* IPS = 48 bits */
+               break;
        case VM_MODE_P40V48_4K:
                tcr_el1 |= 0ul << 14; /* TG0 = 4KB */
                tcr_el1 |= 2ul << 32; /* IPS = 40 bits */
        get_reg(vm, vcpuid, ARM64_CORE_REG(regs.pstate), &pstate);
        get_reg(vm, vcpuid, ARM64_CORE_REG(regs.pc), &pc);
 
-        fprintf(stream, "%*spstate: 0x%.16llx pc: 0x%.16llx\n",
-                indent, "", pstate, pc);
-
+       fprintf(stream, "%*spstate: 0x%.16llx pc: 0x%.16llx\n",
+               indent, "", pstate, pc);
 }
 
 const char * const vm_guest_mode_string[] = {
        "PA-bits:52, VA-bits:48, 4K pages",
        "PA-bits:52, VA-bits:48, 64K pages",
+       "PA-bits:48, VA-bits:48, 4K pages",
+       "PA-bits:48, VA-bits:48, 64K pages",
        "PA-bits:40, VA-bits:48, 4K pages",
        "PA-bits:40, VA-bits:48, 64K pages",
 };
+_Static_assert(sizeof(vm_guest_mode_string)/sizeof(char *) == NUM_VM_MODES,
+              "Missing new mode strings?");
 
 /*
  * VM Create
        switch (vm->mode) {
        case VM_MODE_P52V48_4K:
                vm->pgtable_levels = 4;
+               vm->pa_bits = 52;
+               vm->va_bits = 48;
                vm->page_size = 0x1000;
                vm->page_shift = 12;
-               vm->va_bits = 48;
                break;
        case VM_MODE_P52V48_64K:
                vm->pgtable_levels = 3;
                vm->pa_bits = 52;
+               vm->va_bits = 48;
                vm->page_size = 0x10000;
                vm->page_shift = 16;
+               break;
+       case VM_MODE_P48V48_4K:
+               vm->pgtable_levels = 4;
+               vm->pa_bits = 48;
                vm->va_bits = 48;
+               vm->page_size = 0x1000;
+               vm->page_shift = 12;
+               break;
+       case VM_MODE_P48V48_64K:
+               vm->pgtable_levels = 3;
+               vm->pa_bits = 48;
+               vm->va_bits = 48;
+               vm->page_size = 0x10000;
+               vm->page_shift = 16;
                break;
        case VM_MODE_P40V48_4K:
                vm->pgtable_levels = 4;
  *
  * Within the VM specified by vm, locates a range of available physical
  * pages at or above paddr_min. If found, the pages are marked as in use
- * and thier base address is returned. A TEST_ASSERT failure occurs if
+ * and their base address is returned. A TEST_ASSERT failure occurs if
  * not enough pages are available at or above paddr_min.
  */
 vm_paddr_t vm_phy_pages_alloc(struct kvm_vm *vm, size_t num,