The dma configuration (DCFG) is specific to the product.
Move this configuration in the product specific driver, and add the
field inside the driver struct.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
        rlp_mode = isc->config.rlp_cfg_mode;
        pipeline = isc->config.bits_pipeline;
 
-       dcfg = isc->config.dcfg_imode |
-                      ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8;
+       dcfg = isc->config.dcfg_imode | isc->dcfg;
 
        pfe_cfg0  |= subdev->pfe_cfg0 | ISC_PFE_CFG0_MODE_PROGRESSIVE;
        mask = ISC_PFE_CFG0_BPS_MASK | ISC_PFE_CFG0_HPOL_LOW |
 
  * @hclock:            Hclock clock input (refer datasheet)
  * @ispck:             iscpck clock (refer datasheet)
  * @isc_clks:          ISC clocks
+ * @dcfg:              DMA master configuration, architecture dependent
  *
  * @dev:               Registered device driver
  * @v4l2_dev:          v4l2 registered device
        struct clk              *hclock;
        struct clk              *ispck;
        struct isc_clk          isc_clks[2];
+       u32                     dcfg;
 
        struct device           *dev;
        struct v4l2_device      v4l2_dev;
 
        isc->max_width = ISC_SAMA5D2_MAX_SUPPORT_WIDTH;
        isc->max_height = ISC_SAMA5D2_MAX_SUPPORT_HEIGHT;
 
+       /* sama5d2-isc - 8 bits per beat */
+       isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8;
+
        ret = isc_pipeline_init(isc);
        if (ret)
                return ret;