e1000e: Add support for Comet Lake

commit 914ee9c436cbe90c8ca8a46ec8433cb614a2ada5 upstream.

Add devices ID's for the next LOM generations that will be
available on the next Intel Client platform (Comet Lake)
This patch provides the initial support for these devices

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Cc: Anthony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/net/ethernet/intel/e1000e/hw.h b/drivers/net/ethernet/intel/e1000e/hw.h
index eff75bd8a8f0b9dc08a17f3c5a36b2515c31f0cf..11fdc27faa82b82b09a4d8e664bbb15a05c6130a 100644 (file)
--- a/drivers/net/ethernet/intel/e1000e/hw.h
+++ b/drivers/net/ethernet/intel/e1000e/hw.h
@@ -86,6 +86,12 @@ struct e1000_hw;
 #define E1000_DEV_ID_PCH_ICP_I219_V8           0x15E0
 #define E1000_DEV_ID_PCH_ICP_I219_LM9          0x15E1
 #define E1000_DEV_ID_PCH_ICP_I219_V9           0x15E2
+#define E1000_DEV_ID_PCH_CMP_I219_LM10         0x0D4E
+#define E1000_DEV_ID_PCH_CMP_I219_V10          0x0D4F
+#define E1000_DEV_ID_PCH_CMP_I219_LM11         0x0D4C
+#define E1000_DEV_ID_PCH_CMP_I219_V11          0x0D4D
+#define E1000_DEV_ID_PCH_CMP_I219_LM12         0x0D53
+#define E1000_DEV_ID_PCH_CMP_I219_V12          0x0D55
 
 #define E1000_REVISION_4       4
 

diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c
index 1ec33c614474229d51a61d5fac728267e85f4f1c..4cb05a31e66dff7ecc924296eb71b398e5dfd033 100644 (file)
--- a/drivers/net/ethernet/intel/e1000e/netdev.c
+++ b/drivers/net/ethernet/intel/e1000e/netdev.c
@@ -7568,6 +7568,12 @@ static const struct pci_device_id e1000_pci_tbl[] = {
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V8), board_pch_cnp },
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM9), board_pch_cnp },
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V9), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM10), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V10), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM11), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V11), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM12), board_pch_spt },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V12), board_pch_spt },
 
        { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
 };