]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
perf arm-spe: Prepare for adding data source packet implementations for other cores
authorIlkka Koskinen <ilkka@os.amperecomputing.com>
Fri, 8 Nov 2024 20:29:45 +0000 (20:29 +0000)
committerArnaldo Carvalho de Melo <acme@redhat.com>
Mon, 9 Dec 2024 20:52:41 +0000 (17:52 -0300)
Split Data Source Packet handling to prepare adding support for
other implementations.

Reviewed-by: Leo Yan <leo.yan@arm.com>
Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Graham Woodward <graham.woodward@arm.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@linaro.org>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: John Garry <john.g.garry@oracle.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Leo Yan <leo.yan@linux.dev>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Link: https://lore.kernel.org/r/20241108202946.16835-2-ilkka@os.amperecomputing.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
tools/perf/util/arm-spe.c

index dbf13f47879c005bbf8211630d2ca6b89baedfdd..3064c3f22806917f0e613cded802d2f9880cf745 100644 (file)
@@ -103,6 +103,18 @@ struct arm_spe_queue {
        u32                             flags;
 };
 
+struct data_source_handle {
+       const struct midr_range *midr_ranges;
+       void (*ds_synth)(const struct arm_spe_record *record,
+                        union perf_mem_data_src *data_src);
+};
+
+#define DS(range, func)                                        \
+       {                                               \
+               .midr_ranges = range,                   \
+               .ds_synth = arm_spe__synth_##func,      \
+       }
+
 static void arm_spe_dump(struct arm_spe *spe __maybe_unused,
                         unsigned char *buf, size_t len)
 {
@@ -532,6 +544,10 @@ static void arm_spe__synth_data_source_common(const struct arm_spe_record *recor
        }
 }
 
+static const struct data_source_handle data_source_handles[] = {
+       DS(common_ds_encoding_cpus, data_source_common),
+};
+
 static void arm_spe__synth_memory_level(const struct arm_spe_record *record,
                                        union perf_mem_data_src *data_src)
 {
@@ -555,12 +571,14 @@ static void arm_spe__synth_memory_level(const struct arm_spe_record *record,
                data_src->mem_lvl |= PERF_MEM_LVL_REM_CCE1;
 }
 
-static bool arm_spe__is_common_ds_encoding(struct arm_spe_queue *speq)
+static bool arm_spe__synth_ds(struct arm_spe_queue *speq,
+                             const struct arm_spe_record *record,
+                             union perf_mem_data_src *data_src)
 {
        struct arm_spe *spe = speq->spe;
-       bool is_in_cpu_list;
        u64 *metadata = NULL;
-       u64 midr = 0;
+       u64 midr;
+       unsigned int i;
 
        /* Metadata version 1 assumes all CPUs are the same (old behavior) */
        if (spe->metadata_ver == 1) {
@@ -592,18 +610,20 @@ static bool arm_spe__is_common_ds_encoding(struct arm_spe_queue *speq)
                midr = metadata[ARM_SPE_CPU_MIDR];
        }
 
-       is_in_cpu_list = is_midr_in_range_list(midr, common_ds_encoding_cpus);
-       if (is_in_cpu_list)
-               return true;
-       else
-               return false;
+       for (i = 0; i < ARRAY_SIZE(data_source_handles); i++) {
+               if (is_midr_in_range_list(midr, data_source_handles[i].midr_ranges)) {
+                       data_source_handles[i].ds_synth(record, data_src);
+                       return true;
+               }
+       }
+
+       return false;
 }
 
 static u64 arm_spe__synth_data_source(struct arm_spe_queue *speq,
                                      const struct arm_spe_record *record)
 {
        union perf_mem_data_src data_src = { .mem_op = PERF_MEM_OP_NA };
-       bool is_common = arm_spe__is_common_ds_encoding(speq);
 
        if (record->op & ARM_SPE_OP_LD)
                data_src.mem_op = PERF_MEM_OP_LOAD;
@@ -612,9 +632,7 @@ static u64 arm_spe__synth_data_source(struct arm_spe_queue *speq,
        else
                return 0;
 
-       if (is_common)
-               arm_spe__synth_data_source_common(record, &data_src);
-       else
+       if (!arm_spe__synth_ds(speq, record, &data_src))
                arm_spe__synth_memory_level(record, &data_src);
 
        if (record->type & (ARM_SPE_TLB_ACCESS | ARM_SPE_TLB_MISS)) {