arm64: zynqmp: Enable hs termination flag for USB dwc3 controller

[ Upstream commit 32405e532d358a2f9d4befae928b9883c8597616 ]

Since we need to support legacy phys with the dwc3 controller,
we enable this quirk on the zynqmp platforms.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Link: https://lore.kernel.org/r/20221023215649.221726-1-m.grzeschik@pengutronix.de
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index a549265e55f6e7d7d0cb18c45ce97228101102bd..7c1af75f33a05b5f4e85ce9707a1ee4f0dfb803b 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -825,6 +825,7 @@
                                clock-names = "bus_early", "ref";
                                iommus = <&smmu 0x860>;
                                snps,quirk-frame-length-adjustment = <0x20>;
+                               snps,resume-hs-terminations;
                                /* dma-coherent; */
                        };
                };
@@ -851,6 +852,7 @@
                                clock-names = "bus_early", "ref";
                                iommus = <&smmu 0x861>;
                                snps,quirk-frame-length-adjustment = <0x20>;
+                               snps,resume-hs-terminations;
                                /* dma-coherent; */
                        };
                };