gpu: host1x: Add Tegra SE to SID table

Add Tegra Security Engine details to the SID table in host1x driver.
These entries are required to be in place to configure the stream ID
for SE. Register writes to stream ID registers fail otherwise.

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Acked-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index 89983d7d73ca1539c19ff4a511c0c179bd07ed91..3a0aaa68ac8d917a4fe61c3c67afacd25f47bab8 100644 (file)
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -215,6 +215,30 @@ static const struct host1x_info host1x07_info = {
  * and firmware stream ID in the MMIO path table.
  */
 static const struct host1x_sid_entry tegra234_sid_table[] = {
+       {
+               /* SE2 MMIO */
+               .base = 0x1658,
+               .offset = 0x90,
+               .limit = 0x90
+       },
+       {
+               /* SE4 MMIO */
+               .base = 0x1660,
+               .offset = 0x90,
+               .limit = 0x90
+       },
+       {
+               /* SE2 channel */
+               .base = 0x1738,
+               .offset = 0x90,
+               .limit = 0x90
+       },
+       {
+               /* SE4 channel */
+               .base = 0x1740,
+               .offset = 0x90,
+               .limit = 0x90
+       },
        {
                /* VIC channel */
                .base = 0x17b8,