arm64: dts: mt8183: add capacity-dmips-mhz

Pinned the frequency to the max and run dhrystone to get the value.
little cpu: 11071 (max freq: 1989000)
big cpu: 15293 (max freq: 1989000)

11071 : 15293 ~= 741 : 1024

Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 08274bfcebd846d7e0f48533a0a27ea2f3885938..5b34ec6aad30d5aeedda04c6146478a0a0d2e854 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -56,6 +56,7 @@
                        compatible = "arm,cortex-a53";
                        reg = <0x000>;
                        enable-method = "psci";
+                       capacity-dmips-mhz = <741>;
                };
 
                cpu1: cpu@1 {
@@ -63,6 +64,7 @@
                        compatible = "arm,cortex-a53";
                        reg = <0x001>;
                        enable-method = "psci";
+                       capacity-dmips-mhz = <741>;
                };
 
                cpu2: cpu@2 {
@@ -70,6 +72,7 @@
                        compatible = "arm,cortex-a53";
                        reg = <0x002>;
                        enable-method = "psci";
+                       capacity-dmips-mhz = <741>;
                };
 
                cpu3: cpu@3 {
@@ -77,6 +80,7 @@
                        compatible = "arm,cortex-a53";
                        reg = <0x003>;
                        enable-method = "psci";
+                       capacity-dmips-mhz = <741>;
                };
 
                cpu4: cpu@100 {
@@ -84,6 +88,7 @@
                        compatible = "arm,cortex-a73";
                        reg = <0x100>;
                        enable-method = "psci";
+                       capacity-dmips-mhz = <1024>;
                };
 
                cpu5: cpu@101 {
@@ -91,6 +96,7 @@
                        compatible = "arm,cortex-a73";
                        reg = <0x101>;
                        enable-method = "psci";
+                       capacity-dmips-mhz = <1024>;
                };
 
                cpu6: cpu@102 {
@@ -98,6 +104,7 @@
                        compatible = "arm,cortex-a73";
                        reg = <0x102>;
                        enable-method = "psci";
+                       capacity-dmips-mhz = <1024>;
                };
 
                cpu7: cpu@103 {
@@ -105,6 +112,7 @@
                        compatible = "arm,cortex-a73";
                        reg = <0x103>;
                        enable-method = "psci";
+                       capacity-dmips-mhz = <1024>;
                };
        };