drm/i915: pass dev_priv explicitly to HSW_TVIDEO_DIP_CTL

Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the HSW_TVIDEO_DIP_CTL register macro.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7261777d02eeb94093ed3510989c6809c66d50da.1716808214.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index c0a3b6d506817f359ffb3a1d42a59651e7a3f14d..4fa977f1e6c4ba2300ee3a854d13c8ee75ac4752 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4353,7 +4353,8 @@ void intel_dp_set_infoframes(struct intel_encoder *encoder,
                             const struct drm_connector_state *conn_state)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       i915_reg_t reg = HSW_TVIDEO_DIP_CTL(crtc_state->cpu_transcoder);
+       i915_reg_t reg = HSW_TVIDEO_DIP_CTL(dev_priv,
+                                           crtc_state->cpu_transcoder);
        u32 dip_enable = VIDEO_DIP_ENABLE_AVI_HSW | VIDEO_DIP_ENABLE_GCP_HSW |
                         VIDEO_DIP_ENABLE_VS_HSW | VIDEO_DIP_ENABLE_GMP_HSW |
                         VIDEO_DIP_ENABLE_SPD_HSW | VIDEO_DIP_ENABLE_DRM_GLK;

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 9ac670a40bc1512ed58817e9ddb45ad6f17fc65c..4557acdd8b3c2edfef18816cf203f4542a2b85e3 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -507,7 +507,7 @@ void hsw_write_infoframe(struct intel_encoder *encoder,
        const u32 *data = frame;
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
        enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
-       i915_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(cpu_transcoder);
+       i915_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(dev_priv, cpu_transcoder);
        int data_size;
        int i;
        u32 val = intel_de_read(dev_priv, ctl_reg);
@@ -562,7 +562,7 @@ static u32 hsw_infoframes_enabled(struct intel_encoder *encoder,
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
        u32 val = intel_de_read(dev_priv,
-                               HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder));
+                               HSW_TVIDEO_DIP_CTL(dev_priv, pipe_config->cpu_transcoder));
        u32 mask;
 
        mask = (VIDEO_DIP_ENABLE_VSC_HSW | VIDEO_DIP_ENABLE_AVI_HSW |
@@ -1216,7 +1216,8 @@ static void hsw_set_infoframes(struct intel_encoder *encoder,
                               const struct drm_connector_state *conn_state)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       i915_reg_t reg = HSW_TVIDEO_DIP_CTL(crtc_state->cpu_transcoder);
+       i915_reg_t reg = HSW_TVIDEO_DIP_CTL(dev_priv,
+                                           crtc_state->cpu_transcoder);
        u32 val = intel_de_read(dev_priv, reg);
 
        assert_hdmi_transcoder_func_disabled(dev_priv,

diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index 1d048fa98561bf3a72053a9245410e87cb87a77e..8b26354d6e538eae90212c82624d67d6398538a0 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -641,7 +641,7 @@ u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
 
        if (lspcon->hdr_supported) {
                tmp = intel_de_read(dev_priv,
-                                   HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder));
+                                   HSW_TVIDEO_DIP_CTL(dev_priv, pipe_config->cpu_transcoder));
                mask = VIDEO_DIP_ENABLE_GMP_HSW;
 
                if (tmp & mask)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 29f69ad8f704761766c8fde7a5c3ce2a2ab269c1..0331fdd61f331fd8b8856ae3e42ebf5d6b62ecbc 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3475,7 +3475,7 @@
 #define _ICL_VIDEO_DIP_PPS_ECC_A       0x603D4
 #define _ICL_VIDEO_DIP_PPS_ECC_B       0x613D4
 
-#define HSW_TVIDEO_DIP_CTL(trans)              _MMIO_TRANS2(dev_priv, trans, _HSW_VIDEO_DIP_CTL_A)
+#define HSW_TVIDEO_DIP_CTL(dev_priv, trans)            _MMIO_TRANS2(dev_priv, trans, _HSW_VIDEO_DIP_CTL_A)
 #define HSW_TVIDEO_DIP_GCP(trans)              _MMIO_TRANS2(dev_priv, trans, _HSW_VIDEO_DIP_GCP_A)
 #define HSW_TVIDEO_DIP_AVI_DATA(trans, i)      _MMIO_TRANS2(dev_priv, trans, _HSW_VIDEO_DIP_AVI_DATA_A + (i) * 4)
 #define HSW_TVIDEO_DIP_VS_DATA(trans, i)       _MMIO_TRANS2(dev_priv, trans, _HSW_VIDEO_DIP_VS_DATA_A + (i) * 4)

diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
index b4d5592b18df3709cc2b10b2129e10a27e9c33cf..027cd273d775b434db5b86cec87c97701cfa3a53 100644 (file)
--- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
+++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
@@ -509,9 +509,9 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter)
        MMIO_D(TRANS_MULT(TRANSCODER_A));
        MMIO_D(TRANS_MULT(TRANSCODER_B));
        MMIO_D(TRANS_MULT(TRANSCODER_C));
-       MMIO_D(HSW_TVIDEO_DIP_CTL(TRANSCODER_A));
-       MMIO_D(HSW_TVIDEO_DIP_CTL(TRANSCODER_B));
-       MMIO_D(HSW_TVIDEO_DIP_CTL(TRANSCODER_C));
+       MMIO_D(HSW_TVIDEO_DIP_CTL(dev_priv, TRANSCODER_A));
+       MMIO_D(HSW_TVIDEO_DIP_CTL(dev_priv, TRANSCODER_B));
+       MMIO_D(HSW_TVIDEO_DIP_CTL(dev_priv, TRANSCODER_C));
        MMIO_D(SFUSE_STRAP);
        MMIO_D(SBI_ADDR);
        MMIO_D(SBI_DATA);