#define OPAL_PCI_POLL                          62
 #define OPAL_PCI_MSI_EOI                       63
 #define OPAL_PCI_GET_PHB_DIAG_DATA2            64
+#define OPAL_XSCOM_READ                                65
+#define OPAL_XSCOM_WRITE                       66
+#define OPAL_LPC_READ                          67
+#define OPAL_LPC_WRITE                         68
 
 #ifndef __ASSEMBLY__
 
        OPAL_EPOW_OVER_INTERNAL_TEMP = 3
 };
 
+/*
+ * Address cycle types for LPC accesses. These also correspond
+ * to the content of the first cell of the "reg" property for
+ * device nodes on the LPC bus
+ */
+enum OpalLPCAddressType {
+       OPAL_LPC_MEM    = 0,
+       OPAL_LPC_IO     = 1,
+       OPAL_LPC_FW     = 2,
+};
+
 struct opal_machine_check_event {
        enum OpalMCE_Version    version:8;      /* 0x00 */
        uint8_t                 in_use;         /* 0x01 */
                            uint16_t *pci_error_type, uint16_t *severity);
 int64_t opal_pci_poll(uint64_t phb_id);
 
+int64_t opal_xscom_read(uint32_t gcid, uint32_t pcb_addr, uint64_t *val);
+int64_t opal_xscom_write(uint32_t gcid, uint32_t pcb_addr, uint64_t val);
+
+int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type,
+                      uint32_t addr, uint32_t data, uint32_t sz);
+int64_t opal_lpc_read(uint32_t chip_id, enum OpalLPCAddressType addr_type,
+                     uint32_t addr, uint32_t *data, uint32_t sz);
+
 /* Internal functions */
 extern int early_init_dt_scan_opal(unsigned long node, const char *uname, int depth, void *data);
 
 
 OPAL_CALL(opal_pci_poll,                       OPAL_PCI_POLL);
 OPAL_CALL(opal_pci_msi_eoi,                    OPAL_PCI_MSI_EOI);
 OPAL_CALL(opal_pci_get_phb_diag_data2,         OPAL_PCI_GET_PHB_DIAG_DATA2);
+OPAL_CALL(opal_xscom_read,                     OPAL_XSCOM_READ);
+OPAL_CALL(opal_xscom_write,                    OPAL_XSCOM_WRITE);
+OPAL_CALL(opal_lpc_read,                       OPAL_LPC_READ);
+OPAL_CALL(opal_lpc_write,                      OPAL_LPC_WRITE);