]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
net/mlx5: fs, add HWS root namespace functions
authorMoshe Shemesh <moshe@nvidia.com>
Thu, 9 Jan 2025 16:05:32 +0000 (18:05 +0200)
committerJakub Kicinski <kuba@kernel.org>
Tue, 14 Jan 2025 03:21:07 +0000 (19:21 -0800)
Add flow steering commands structure for HW steering. Implement create,
destroy and set peer HW steering root namespace functions.

Signed-off-by: Moshe Shemesh <moshe@nvidia.com>
Reviewed-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: Mark Bloch <mbloch@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20250109160546.1733647-2-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/mellanox/mlx5/core/Makefile
drivers/net/ethernet/mellanox/mlx5/core/fs_core.h
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.c [new file with mode: 0644]
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.h [new file with mode: 0644]

index 10a763e668ed67139ce98a2a69a498943a3b6286..0008b22417c8f8a110fe7af8917ab4154707160c 100644 (file)
@@ -151,8 +151,8 @@ mlx5_core-$(CONFIG_MLX5_HW_STEERING) += steering/hws/cmd.o \
                                        steering/hws/bwc.o \
                                        steering/hws/debug.o \
                                        steering/hws/vport.o \
-                                       steering/hws/bwc_complex.o
-
+                                       steering/hws/bwc_complex.o \
+                                       steering/hws/fs_hws.o
 
 #
 # SF device
index bad2df0715ecc977162bb9bf3c37ab80d9e245b1..d309906d1106c178ce8fa51a6ede7dcae53434e1 100644 (file)
@@ -38,6 +38,7 @@
 #include <linux/rhashtable.h>
 #include <linux/llist.h>
 #include <steering/sws/fs_dr.h>
+#include <steering/hws/fs_hws.h>
 
 #define FDB_TC_MAX_CHAIN 3
 #define FDB_FT_CHAIN (FDB_TC_MAX_CHAIN + 1)
@@ -126,7 +127,8 @@ enum fs_fte_status {
 
 enum mlx5_flow_steering_mode {
        MLX5_FLOW_STEERING_MODE_DMFS,
-       MLX5_FLOW_STEERING_MODE_SMFS
+       MLX5_FLOW_STEERING_MODE_SMFS,
+       MLX5_FLOW_STEERING_MODE_HMFS,
 };
 
 enum mlx5_flow_steering_capabilty {
@@ -293,7 +295,10 @@ struct mlx5_flow_group {
 struct mlx5_flow_root_namespace {
        struct mlx5_flow_namespace      ns;
        enum   mlx5_flow_steering_mode  mode;
-       struct mlx5_fs_dr_domain        fs_dr_domain;
+       union {
+               struct mlx5_fs_dr_domain        fs_dr_domain;
+               struct mlx5_fs_hws_context      fs_hws_context;
+       };
        enum   fs_flow_table_type       table_type;
        struct mlx5_core_dev            *dev;
        struct mlx5_flow_table          *root_ft;
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.c
new file mode 100644 (file)
index 0000000..ac61f96
--- /dev/null
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
+/* Copyright (c) 2025 NVIDIA Corporation & Affiliates */
+
+#include <mlx5_core.h>
+#include <fs_core.h>
+#include <fs_cmd.h>
+#include "mlx5hws.h"
+
+#define MLX5HWS_CTX_MAX_NUM_OF_QUEUES 16
+#define MLX5HWS_CTX_QUEUE_SIZE 256
+
+static int mlx5_cmd_hws_create_ns(struct mlx5_flow_root_namespace *ns)
+{
+       struct mlx5hws_context_attr hws_ctx_attr = {};
+
+       hws_ctx_attr.queues = min_t(int, num_online_cpus(),
+                                   MLX5HWS_CTX_MAX_NUM_OF_QUEUES);
+       hws_ctx_attr.queue_size = MLX5HWS_CTX_QUEUE_SIZE;
+
+       ns->fs_hws_context.hws_ctx =
+               mlx5hws_context_open(ns->dev, &hws_ctx_attr);
+       if (!ns->fs_hws_context.hws_ctx) {
+               mlx5_core_err(ns->dev, "Failed to create hws flow namespace\n");
+               return -EINVAL;
+       }
+       return 0;
+}
+
+static int mlx5_cmd_hws_destroy_ns(struct mlx5_flow_root_namespace *ns)
+{
+       return mlx5hws_context_close(ns->fs_hws_context.hws_ctx);
+}
+
+static int mlx5_cmd_hws_set_peer(struct mlx5_flow_root_namespace *ns,
+                                struct mlx5_flow_root_namespace *peer_ns,
+                                u16 peer_vhca_id)
+{
+       struct mlx5hws_context *peer_ctx = NULL;
+
+       if (peer_ns)
+               peer_ctx = peer_ns->fs_hws_context.hws_ctx;
+       mlx5hws_context_set_peer(ns->fs_hws_context.hws_ctx, peer_ctx,
+                                peer_vhca_id);
+       return 0;
+}
+
+static const struct mlx5_flow_cmds mlx5_flow_cmds_hws = {
+       .create_ns = mlx5_cmd_hws_create_ns,
+       .destroy_ns = mlx5_cmd_hws_destroy_ns,
+       .set_peer = mlx5_cmd_hws_set_peer,
+};
+
+const struct mlx5_flow_cmds *mlx5_fs_cmd_get_hws_cmds(void)
+{
+       return &mlx5_flow_cmds_hws;
+}
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.h
new file mode 100644 (file)
index 0000000..17ac0d1
--- /dev/null
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
+/* Copyright (c) 2025 NVIDIA Corporation & Affiliates */
+
+#ifndef _MLX5_FS_HWS_
+#define _MLX5_FS_HWS_
+
+#include "mlx5hws.h"
+
+struct mlx5_fs_hws_context {
+       struct mlx5hws_context  *hws_ctx;
+};
+
+#ifdef CONFIG_MLX5_HW_STEERING
+
+const struct mlx5_flow_cmds *mlx5_fs_cmd_get_hws_cmds(void);
+
+#else
+
+static inline const struct mlx5_flow_cmds *mlx5_fs_cmd_get_hws_cmds(void)
+{
+       return NULL;
+}
+
+#endif /* CONFIG_MLX5_HWS_STEERING */
+#endif