{
        struct drm_i915_private *i915 = engine->i915;
 
+       /* WaDisableBankHangMode:icl */
+       wa_write(wal,
+                GEN8_L3CNTLREG,
+                intel_uncore_read(engine->uncore, GEN8_L3CNTLREG) |
+                GEN8_ERRDETBCTRL);
+
        /* Wa_1604370585:icl (pre-prod)
         * Formerly known as WaPushConstantDereferenceHoldDisable
         */
 
   #define GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION             (1 << 8)
   #define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE                 (1 << 0)
 
+#define GEN8_L3CNTLREG _MMIO(0x7034)
+  #define GEN8_ERRDETBCTRL (1 << 9)
+
 #define GEN11_COMMON_SLICE_CHICKEN3            _MMIO(0x7304)
   #define GEN11_BLEND_EMB_FIX_DISABLE_IN_RCC   (1 << 11)