x->mac_gmii_rx_proto_engine++;
 }
 
+static void dwmac1000_set_mac_loopback(void __iomem *ioaddr, bool enable)
+{
+       u32 value = readl(ioaddr + GMAC_CONTROL);
+
+       if (enable)
+               value |= GMAC_CONTROL_LM;
+       else
+               value &= ~GMAC_CONTROL_LM;
+
+       writel(value, ioaddr + GMAC_CONTROL);
+}
+
 const struct stmmac_ops dwmac1000_ops = {
        .core_init = dwmac1000_core_init,
        .set_mac = stmmac_set_mac,
        .pcs_ctrl_ane = dwmac1000_ctrl_ane,
        .pcs_rane = dwmac1000_rane,
        .pcs_get_adv_lp = dwmac1000_get_adv_lp,
+       .set_mac_loopback = dwmac1000_set_mac_loopback,
 };
 
 int dwmac1000_setup(struct stmmac_priv *priv)