ixgbe: Release semaphore bits in the right order

The global semaphore bits should be released in the reverse of the
order that they were taken, so correct that.

Signed-off-by: Mark Rustad <mark.d.rustad@intel.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c
index f5f948d08b436147ca20c076ad80622544cd11a3..0a8b5e42e1a9b2dbd66e776962cacbb47ec021d2 100644 (file)
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c
@@ -696,14 +696,14 @@ static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw)
 
        /* Release both semaphores by writing 0 to the bits REGSMP and SMBI */
 
-       swsm = IXGBE_READ_REG(hw, IXGBE_SWSM);
-       swsm &= ~IXGBE_SWSM_SMBI;
-       IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm);
-
        swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC);
        swsm &= ~IXGBE_SWFW_REGSMP;
        IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC, swsm);
 
+       swsm = IXGBE_READ_REG(hw, IXGBE_SWSM);
+       swsm &= ~IXGBE_SWSM_SMBI;
+       IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm);
+
        IXGBE_WRITE_FLUSH(hw);
 }