phy: rockchip-pcie: Use regmap_read_poll_timeout() for PCIe reference clk PLL status

Replace open-coded phy PCIe reference clk PLL status polling with
regmap_read_poll_timeout API. This change simplifies the code without
altering functionality.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Link: https://lore.kernel.org/r/20241012071919.3726-4-linux.amoon@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/phy/rockchip/phy-rockchip-pcie.c b/drivers/phy/rockchip/phy-rockchip-pcie.c
index b5b1b1a667b215283684d58a9f9e447e4aa5e7f8..e60f24b0b363e609cb5e122203d0159ca92a4586 100644 (file)
--- a/drivers/phy/rockchip/phy-rockchip-pcie.c
+++ b/drivers/phy/rockchip/phy-rockchip-pcie.c
@@ -162,7 +162,6 @@ static int rockchip_pcie_phy_power_on(struct phy *phy)
        struct rockchip_pcie_phy *rk_phy = to_pcie_phy(inst);
        int err = 0;
        u32 status;
-       unsigned long timeout;
 
        mutex_lock(&rk_phy->pcie_mutex);
 
@@ -191,21 +190,11 @@ static int rockchip_pcie_phy_power_on(struct phy *phy)
         * so we make it large enough here. And we use loop-break
         * method which should not be harmful.
         */
-       timeout = jiffies + msecs_to_jiffies(1000);
-
-       err = -EINVAL;
-       while (time_before(jiffies, timeout)) {
-               regmap_read(rk_phy->reg_base,
-                           rk_phy->phy_data->pcie_status,
-                           &status);
-               if (status & PHY_PLL_LOCKED) {
-                       dev_dbg(&phy->dev, "pll locked!\n");
-                       err = 0;
-                       break;
-               }
-               msleep(20);
-       }
-
+       err = regmap_read_poll_timeout(rk_phy->reg_base,
+                                      rk_phy->phy_data->pcie_status,
+                                      status,
+                                      status & PHY_PLL_LOCKED,
+                                      200, 100000);
        if (err) {
                dev_err(&phy->dev, "pll lock timeout!\n");
                goto err_pll_lock;
@@ -214,19 +203,11 @@ static int rockchip_pcie_phy_power_on(struct phy *phy)
        phy_wr_cfg(rk_phy, PHY_CFG_CLK_TEST, PHY_CFG_SEPE_RATE);
        phy_wr_cfg(rk_phy, PHY_CFG_CLK_SCC, PHY_CFG_PLL_100M);
 
-       err = -ETIMEDOUT;
-       while (time_before(jiffies, timeout)) {
-               regmap_read(rk_phy->reg_base,
-                           rk_phy->phy_data->pcie_status,
-                           &status);
-               if (!(status & PHY_PLL_OUTPUT)) {
-                       dev_dbg(&phy->dev, "pll output enable done!\n");
-                       err = 0;
-                       break;
-               }
-               msleep(20);
-       }
-
+       err = regmap_read_poll_timeout(rk_phy->reg_base,
+                                      rk_phy->phy_data->pcie_status,
+                                      status,
+                                      !(status & PHY_PLL_OUTPUT),
+                                      200, 100000);
        if (err) {
                dev_err(&phy->dev, "pll output enable timeout!\n");
                goto err_pll_lock;
@@ -236,19 +217,12 @@ static int rockchip_pcie_phy_power_on(struct phy *phy)
                     HIWORD_UPDATE(PHY_CFG_PLL_LOCK,
                                   PHY_CFG_ADDR_MASK,
                                   PHY_CFG_ADDR_SHIFT));
-       err = -EINVAL;
-       while (time_before(jiffies, timeout)) {
-               regmap_read(rk_phy->reg_base,
-                           rk_phy->phy_data->pcie_status,
-                           &status);
-               if (status & PHY_PLL_LOCKED) {
-                       dev_dbg(&phy->dev, "pll relocked!\n");
-                       err = 0;
-                       break;
-               }
-               msleep(20);
-       }
 
+       err = regmap_read_poll_timeout(rk_phy->reg_base,
+                                      rk_phy->phy_data->pcie_status,
+                                      status,
+                                      status & PHY_PLL_LOCKED,
+                                      200, 100000);
        if (err) {
                dev_err(&phy->dev, "pll relock timeout!\n");
                goto err_pll_lock;