drm/amdgpu: check df_funcs and its callback pointers

in case they are not avaiable in early phase

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c
index 82e9ecf8435238a8d8ad94b4bf7f57d1cc202e2f..71ee361d097261f7e0e27e30175d3d955103eff0 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c
@@ -233,6 +233,10 @@ static void amdgpu_perf_start(struct perf_event *event, int flags)
        if (WARN_ON_ONCE(!(hwc->state & PERF_HES_STOPPED)))
                return;
 
+       if ((!pe->adev->df.funcs) ||
+           (!pe->adev->df.funcs->pmc_start))
+               return;
+
        WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE));
        hwc->state = 0;
 
@@ -268,6 +272,10 @@ static void amdgpu_perf_read(struct perf_event *event)
                                                  pmu);
        u64 count, prev;
 
+       if ((!pe->adev->df.funcs) ||
+           (!pe->adev->df.funcs->pmc_get_count))
+               return;
+
        do {
                prev = local64_read(&hwc->prev_count);
 
@@ -297,6 +305,10 @@ static void amdgpu_perf_stop(struct perf_event *event, int flags)
        if (hwc->state & PERF_HES_UPTODATE)
                return;
 
+       if ((!pe->adev->df.funcs) ||
+           (!pe->adev->df.funcs->pmc_stop))
+               return;
+
        switch (hwc->config_base) {
        case AMDGPU_PMU_EVENT_CONFIG_TYPE_DF:
        case AMDGPU_PMU_EVENT_CONFIG_TYPE_XGMI:
@@ -326,6 +338,10 @@ static int amdgpu_perf_add(struct perf_event *event, int flags)
                                                  struct amdgpu_pmu_entry,
                                                  pmu);
 
+       if ((!pe->adev->df.funcs) ||
+           (!pe->adev->df.funcs->pmc_start))
+               return -EINVAL;
+
        switch (pe->pmu_perf_type) {
        case AMDGPU_PMU_PERF_TYPE_DF:
                hwc->config_base = AMDGPU_PMU_EVENT_CONFIG_TYPE_DF;
@@ -371,6 +387,9 @@ static void amdgpu_perf_del(struct perf_event *event, int flags)
        struct amdgpu_pmu_entry *pe = container_of(event->pmu,
                                                  struct amdgpu_pmu_entry,
                                                  pmu);
+       if ((!pe->adev->df.funcs) ||
+           (!pe->adev->df.funcs->pmc_stop))
+               return;
 
        amdgpu_perf_stop(event, PERF_EF_UPDATE);
 

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
index 567df2db23ac783aa851011194298b55429a6bed..a38c6a747fa4cbc16933e3fd8cf2525bb77556e8 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
@@ -265,6 +265,11 @@ static ssize_t amdgpu_xgmi_show_error(struct device *dev,
        ficaa_pie_ctl_in = AMDGPU_XGMI_SET_FICAA(0x200);
        ficaa_pie_status_in = AMDGPU_XGMI_SET_FICAA(0x208);
 
+       if ((!adev->df.funcs) ||
+           (!adev->df.funcs->get_fica) ||
+           (!adev->df.funcs->set_fica))
+               return -EINVAL;
+
        fica_out = adev->df.funcs->get_fica(adev, ficaa_pie_ctl_in);
        if (fica_out != 0x1f)
                pr_err("xGMI error counters not enabled!\n");

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 7490ce8295c146dbcccd7b47849cc40ca75a8fe3..9684d867199e342fee6cb134e11fe0434a6a017d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1294,7 +1294,8 @@ static int gmc_v9_0_late_init(void *handle)
        if (!amdgpu_sriov_vf(adev) &&
            (adev->ip_versions[UMC_HWIP][0] == IP_VERSION(6, 0, 0))) {
                if (!(adev->ras_enabled & (1 << AMDGPU_RAS_BLOCK__UMC))) {
-                       if (adev->df.funcs->enable_ecc_force_par_wr_rmw)
+                       if (adev->df.funcs &&
+                           adev->df.funcs->enable_ecc_force_par_wr_rmw)
                                adev->df.funcs->enable_ecc_force_par_wr_rmw(adev, false);
                }
        }
@@ -1505,9 +1506,11 @@ static int gmc_v9_0_sw_init(void *handle)
                        chansize = 64;
                else
                        chansize = 128;
-
-               numchan = adev->df.funcs->get_hbm_channel_number(adev);
-               adev->gmc.vram_width = numchan * chansize;
+               if (adev->df.funcs &&
+                   adev->df.funcs->get_hbm_channel_number) {
+                       numchan = adev->df.funcs->get_hbm_channel_number(adev);
+                       adev->gmc.vram_width = numchan * chansize;
+               }
        }
 
        adev->gmc.vram_type = vram_type;

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index de9b55383e9f8088cb8dc8425fe47f86a7686208..a06c4944ed37cee4f882e2c6cb16a93db8c2dacb 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -1238,7 +1238,9 @@ static int soc15_common_sw_init(void *handle)
        if (amdgpu_sriov_vf(adev))
                xgpu_ai_mailbox_add_irq_id(adev);
 
-       adev->df.funcs->sw_init(adev);
+       if (adev->df.funcs &&
+           adev->df.funcs->sw_init)
+               adev->df.funcs->sw_init(adev);
 
        return 0;
 }
@@ -1250,7 +1252,10 @@ static int soc15_common_sw_fini(void *handle)
        if (adev->nbio.ras_funcs &&
            adev->nbio.ras_funcs->ras_fini)
                adev->nbio.ras_funcs->ras_fini(adev);
-       adev->df.funcs->sw_fini(adev);
+
+       if (adev->df.funcs &&
+           adev->df.funcs->sw_fini)
+               adev->df.funcs->sw_fini(adev);
        return 0;
 }