int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block)
 {
        int r;
-       r = amdgpu_ras_block_late_init(adev, adev->gfx.ras_if);
+       r = amdgpu_ras_block_late_init(adev, ras_block);
        if (r)
                return r;
 
-       if (amdgpu_ras_is_supported(adev, adev->gfx.ras_if->block)) {
+       if (amdgpu_ras_is_supported(adev, ras_block->block)) {
                if (!amdgpu_persistent_edc_harvesting_supported(adev))
                        amdgpu_ras_reset_error_status(adev, AMDGPU_RAS_BLOCK__GFX);
 
 
        return 0;
 late_fini:
-       amdgpu_ras_block_late_fini(adev, adev->gfx.ras_if);
+       amdgpu_ras_block_late_fini(adev, ras_block);
        return r;
 }
 
 
        int r;
 
        if (adev->umc.ras && adev->umc.ras->ras_block.ras_late_init) {
-               r = adev->umc.ras->ras_block.ras_late_init(adev, NULL);
+               r = adev->umc.ras->ras_block.ras_late_init(adev, adev->umc.ras_if);
                if (r)
                        return r;
        }
        }
 
        if (adev->gmc.xgmi.ras && adev->gmc.xgmi.ras->ras_block.ras_late_init) {
-               r = adev->gmc.xgmi.ras->ras_block.ras_late_init(adev, NULL);
+               r = adev->gmc.xgmi.ras->ras_block.ras_late_init(adev, adev->gmc.xgmi.ras_if);
                if (r)
                        return r;
        }
 
 int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block)
 {
        int r;
-       r = amdgpu_ras_block_late_init(adev, adev->nbio.ras_if);
+       r = amdgpu_ras_block_late_init(adev, ras_block);
        if (r)
                return r;
 
-       if (amdgpu_ras_is_supported(adev, adev->nbio.ras_if->block)) {
+       if (amdgpu_ras_is_supported(adev, ras_block->block)) {
                r = amdgpu_irq_get(adev, &adev->nbio.ras_controller_irq, 0);
                if (r)
                        goto late_fini;
 
        return 0;
 late_fini:
-       amdgpu_ras_block_late_fini(adev, adev->nbio.ras_if);
+       amdgpu_ras_block_late_fini(adev, ras_block);
        return r;
 }
 
 
 {
        int r, i;
 
-       r = amdgpu_ras_block_late_init(adev, adev->sdma.ras_if);
+       r = amdgpu_ras_block_late_init(adev, ras_block);
        if (r)
                return r;
 
-       if (amdgpu_ras_is_supported(adev, adev->sdma.ras_if->block)) {
+       if (amdgpu_ras_is_supported(adev, ras_block->block)) {
                for (i = 0; i < adev->sdma.num_instances; i++) {
                        r = amdgpu_irq_get(adev, &adev->sdma.ecc_irq,
                                AMDGPU_SDMA_IRQ_INSTANCE0 + i);
        return 0;
 
 late_fini:
-       amdgpu_ras_block_late_fini(adev, adev->sdma.ras_if);
+       amdgpu_ras_block_late_fini(adev, ras_block);
        return r;
 }
 
 
 {
        int r;
 
-       r = amdgpu_ras_block_late_init(adev, adev->umc.ras_if);
+       r = amdgpu_ras_block_late_init(adev, ras_block);
        if (r)
                return r;
 
-       if (amdgpu_ras_is_supported(adev, adev->umc.ras_if->block)) {
+       if (amdgpu_ras_is_supported(adev, ras_block->block)) {
                r = amdgpu_irq_get(adev, &adev->gmc.ecc_irq, 0);
                if (r)
                        goto late_fini;
        return 0;
 
 late_fini:
-       amdgpu_ras_block_late_fini(adev, adev->umc.ras_if);
+       amdgpu_ras_block_late_fini(adev, ras_block);
        return r;
 }
 
 
 
        adev->gmc.xgmi.ras->ras_block.hw_ops->reset_ras_error_count(adev);
 
-       return amdgpu_ras_block_late_init(adev, adev->gmc.xgmi.ras_if);
+       return amdgpu_ras_block_late_init(adev, ras_block);
 }
 
 static void amdgpu_xgmi_ras_fini(struct amdgpu_device *adev)
 
                return r;
 
        if (adev->gfx.ras && adev->gfx.ras->ras_block.ras_late_init) {
-               r = adev->gfx.ras->ras_block.ras_late_init(adev, NULL);
+               r = adev->gfx.ras->ras_block.ras_late_init(adev, adev->gfx.ras_if);
                if (r)
                        return r;
        }
 
        }
 
        if (adev->sdma.ras && adev->sdma.ras->ras_block.ras_late_init)
-               return adev->sdma.ras->ras_block.ras_late_init(adev, NULL);
+               return adev->sdma.ras->ras_block.ras_late_init(adev, adev->sdma.ras_if);
        else
                return 0;
 }
 
                xgpu_ai_mailbox_get_irq(adev);
 
        if (adev->nbio.ras && adev->nbio.ras->ras_block.ras_late_init)
-               r = adev->nbio.ras->ras_block.ras_late_init(adev, NULL);
+               r = adev->nbio.ras->ras_block.ras_late_init(adev, adev->nbio.ras_if);
 
        return r;
 }