arm64: dts: Add power controller device node of MT2712

add power controller node for MT2712

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index cbe14718ca00f909e73d4950d31f6f4df2a98c0c..fdf66f4fe7c3166eb527a9f504f55e28ab5afce2 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -8,6 +8,7 @@
 #include <dt-bindings/clock/mt2712-clk.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/mt2712-power.h>
 
 / {
        compatible = "mediatek,mt2712";
@@ -229,6 +230,21 @@
                #clock-cells = <1>;
        };
 
+       scpsys: scpsys@10006000 {
+               compatible = "mediatek,mt2712-scpsys", "syscon";
+               #power-domain-cells = <1>;
+               reg = <0 0x10006000 0 0x1000>;
+               clocks = <&topckgen CLK_TOP_MM_SEL>,
+                        <&topckgen CLK_TOP_MFG_SEL>,
+                        <&topckgen CLK_TOP_VENC_SEL>,
+                        <&topckgen CLK_TOP_JPGDEC_SEL>,
+                        <&topckgen CLK_TOP_A1SYS_HP_SEL>,
+                        <&topckgen CLK_TOP_VDEC_SEL>;
+               clock-names = "mm", "mfg", "venc",
+                       "jpgdec", "audio", "vdec";
+               infracfg = <&infracfg>;
+       };
+
        uart5: serial@1000f000 {
                compatible = "mediatek,mt2712-uart",
                             "mediatek,mt6577-uart";