mdio-parent-bus = <&emdio1>;
                        reg = <0x54 1>;         /* BRDCFG4 */
                        mux-mask = <0xe0>;      /* EMI1_MDIO */
-                       #address-cells=<1>;
+                       #address-cells = <1>;
                        #size-cells = <0>;
 
                        /* Child MDIO buses, one for each riser card:
 
 
                                snvs_rtc: snvs-rtc-lp {
                                        compatible = "fsl,sec-v4.0-mon-rtc-lp";
-                                       regmap =<&snvs>;
+                                       regmap = <&snvs>;
                                        offset = <0x34>;
                                        interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
                                                     <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                                        pgc_vpumix: power-domain@19 {
                                                #power-domain-cells = <0>;
                                                reg = <IMX8MP_POWER_DOMAIN_VPUMIX>;
-                                               clocks =<&clk IMX8MP_CLK_VPU_ROOT>;
+                                               clocks = <&clk IMX8MP_CLK_VPU_ROOT>;
                                        };
 
                                        pgc_vpu_g1: power-domain@20 {
                        #size-cells = <2>;
                        device_type = "pci";
                        bus-range = <0x00 0xff>;
-                       ranges =  <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000>, /* downstream I/O 64KB */
-                                 <0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */
+                       ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000>, /* downstream I/O 64KB */
+                                <0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */
                        num-lanes = <1>;
                        num-viewport = <4>;
                        interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
 
                reg = <0x6a>;
                vdd-supply = <®_3v3_p>;
                vddio-supply = <®_3v3_p>;
-               mount-matrix =  "1",  "0",  "0",
-                               "0",  "1",  "0",
-                               "0",  "0", "-1";
+               mount-matrix = "1",  "0",  "0",
+                              "0",  "1",  "0",
+                              "0",  "0", "-1";
        };
 };
 
 
 };
 
 &accel_gyro {
-       mount-matrix =  "1",  "0",  "0",
-                       "0", "-1",  "0",
-                       "0",  "0",  "1";
+       mount-matrix = "1",  "0",  "0",
+                      "0", "-1",  "0",
+                      "0",  "0",  "1";
 };
 
 &bq25895 {
 
 };
 
 &accel_gyro {
-       mount-matrix =  "1",  "0",  "0",
-                       "0",  "1",  "0",
-                       "0",  "0", "-1";
+       mount-matrix = "1",  "0",  "0",
+                      "0",  "1",  "0",
+                      "0",  "0", "-1";
 };
 
 &bq25895 {
 };
 
 &magnetometer {
-       mount-matrix =  "1",  "0",  "0",
-                       "0", "-1",  "0",
-                       "0",  "0", "-1";
+       mount-matrix = "1",  "0",  "0",
+                      "0", "-1",  "0",
+                      "0",  "0", "-1";
 };
 
 &proximity {
 
 
                                snvs_rtc: snvs-rtc-lp{
                                        compatible = "fsl,sec-v4.0-mon-rtc-lp";
-                                       regmap =<&snvs>;
+                                       regmap = <&snvs>;
                                        offset = <0x34>;
                                        interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
                                                <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                        #size-cells = <2>;
                        device_type = "pci";
                        bus-range = <0x00 0xff>;
-                       ranges =  <0x81000000 0 0x00000000 0x27f80000 0 0x00010000>, /* downstream I/O 64KB */
-                                 <0x82000000 0 0x20000000 0x20000000 0 0x07f00000>; /* non-prefetchable memory */
+                       ranges = <0x81000000 0 0x00000000 0x27f80000 0 0x00010000>, /* downstream I/O 64KB */
+                                <0x82000000 0 0x20000000 0x20000000 0 0x07f00000>; /* non-prefetchable memory */
                        num-lanes = <1>;
                        interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "msi";
 
 
 /* Colibri UART_A */
 &lpuart3 {
-       status= "okay";
+       status = "okay";
 };
 
 /* Colibri SDCard */
 
 
 /* Colibri UART_A */
 &lpuart3 {
-       status= "okay";
+       status = "okay";
 };
 
 &lsio_gpio3 {
 
                                clock-names = "ipg", "ahb", "per";
                                bus-width = <8>;
                                fsl,tuning-start-tap = <20>;
-                               fsl,tuning-step= <2>;
+                               fsl,tuning-step = <2>;
                                status = "disabled";
                        };
 
                                clock-names = "ipg", "ahb", "per";
                                bus-width = <4>;
                                fsl,tuning-start-tap = <20>;
-                               fsl,tuning-step= <2>;
+                               fsl,tuning-step = <2>;
                                status = "disabled";
                        };
 
                                clock-names = "ipg", "ahb", "per";
                                bus-width = <4>;
                                fsl,tuning-start-tap = <20>;
-                               fsl,tuning-step= <2>;
+                               fsl,tuning-step = <2>;
                                status = "disabled";
                        };
                };