net: phy: mscc: coma mode disabled for VSC8514

The 'coma mode' (configurable through sw or hw) provides an
optional feature that may be used to control when the PHYs become active.
The typical usage is to synchronize the link-up time across
all PHY instances. This patch releases coma mode if not done by hardware,
otherwise the phys will not link-up.

Fixes: e4f9ba642f0b ("net: phy: mscc: add support for VSC8514 PHY.")
Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com>
Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/phy/mscc/mscc.h b/drivers/net/phy/mscc/mscc.h
index 2028c319f14dd2de738f501fe7b7d8ff3bde532f..a50235fdf7d99d2f5db21dc8e002a0830223ae08 100644 (file)
--- a/drivers/net/phy/mscc/mscc.h
+++ b/drivers/net/phy/mscc/mscc.h
@@ -140,6 +140,10 @@ enum rgmii_clock_delay {
 #define MSCC_PHY_PAGE_1588               0x1588 /* PTP (1588) */
 #define MSCC_PHY_PAGE_TEST               0x2a30 /* Test reg */
 #define MSCC_PHY_PAGE_TR                 0x52b5 /* Token ring registers */
+#define MSCC_PHY_GPIO_CONTROL_2           14
+
+#define MSCC_PHY_COMA_MODE               0x2000 /* input(1) / output(0) */
+#define MSCC_PHY_COMA_OUTPUT             0x1000 /* value to output */
 
 /* Extended Page 1 Registers */
 #define MSCC_PHY_CU_MEDIA_CRC_VALID_CNT          18

diff --git a/drivers/net/phy/mscc/mscc_main.c b/drivers/net/phy/mscc/mscc_main.c
index 0e6e7076a740ecff4e8cbee91d3738f9ed73f8c0..3a7705228ed59c5bf8a99556b75381b149ef51e5 100644 (file)
--- a/drivers/net/phy/mscc/mscc_main.c
+++ b/drivers/net/phy/mscc/mscc_main.c
@@ -1516,6 +1516,21 @@ static void vsc8584_get_base_addr(struct phy_device *phydev)
        vsc8531->addr = addr;
 }
 
+static void vsc85xx_coma_mode_release(struct phy_device *phydev)
+{
+       /* The coma mode (pin or reg) provides an optional feature that
+        * may be used to control when the PHYs become active.
+        * Alternatively the COMA_MODE pin may be connected low
+        * so that the PHYs are fully active once out of reset.
+        */
+
+       /* Enable output (mode=0) and write zero to it */
+       vsc85xx_phy_write_page(phydev, MSCC_PHY_PAGE_EXTENDED_GPIO);
+       __phy_modify(phydev, MSCC_PHY_GPIO_CONTROL_2,
+                    MSCC_PHY_COMA_MODE | MSCC_PHY_COMA_OUTPUT, 0);
+       vsc85xx_phy_write_page(phydev, MSCC_PHY_PAGE_STANDARD);
+}
+
 static int vsc8584_config_init(struct phy_device *phydev)
 {
        struct vsc8531_private *vsc8531 = phydev->priv;
@@ -1962,6 +1977,7 @@ static int vsc8514_config_init(struct phy_device *phydev)
                ret = vsc8514_config_host_serdes(phydev);
                if (ret)
                        goto err;
+               vsc85xx_coma_mode_release(phydev);
        }
 
        phy_unlock_mdio_bus(phydev);