gpio: Langwell GPIO driver bugfixes

- Remove wrong and unnecessary unmask operation

- Remove extra GEDR reading

This fixes the loss of interrupts which occurs when two or more pins are
triggered in close succession.

Signed-off-by: Alek Du <alek.du@intel.com>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

diff --git a/drivers/gpio/langwell_gpio.c b/drivers/gpio/langwell_gpio.c
index 5711ce5353c65975ec801f66a407b459cd8e664b..4baf3d7d0f8e6e4f1f7887625b7f73a62dba1a83 100644 (file)
--- a/drivers/gpio/langwell_gpio.c
+++ b/drivers/gpio/langwell_gpio.c
@@ -144,13 +144,6 @@ static int lnw_irq_type(unsigned irq, unsigned type)
 
 static void lnw_irq_unmask(unsigned irq)
 {
-       struct lnw_gpio *lnw = get_irq_chip_data(irq);
-       u32 gpio = irq - lnw->irq_base;
-       u8 reg = gpio / 32;
-       void __iomem *gedr;
-
-       gedr = (void __iomem *)(&lnw->reg_base->GEDR[reg]);
-       writel(BIT(gpio % 32), gedr);
 };
 
 static void lnw_irq_mask(unsigned irq)
@@ -183,13 +176,11 @@ static void lnw_irq_handler(unsigned irq, struct irq_desc *desc)
                gedr_v = readl(gedr);
                if (!gedr_v)
                        continue;
-               for (gpio = reg*32; gpio < reg*32+32; gpio++) {
-                       gedr_v = readl(gedr);
+               for (gpio = reg*32; gpio < reg*32+32; gpio++)
                        if (gedr_v & BIT(gpio % 32)) {
                                pr_debug("pin %d triggered\n", gpio);
                                generic_handle_irq(lnw->irq_base + gpio);
                        }
-               }
                /* clear the edge detect status bit */
                writel(gedr_v, gedr);
        }