arm64: dts: broadcom: bcm2712: Use "l2-cache" for L2 cache node names

There's no need include the CPU number in the L2 cache node names as
the names are local to the CPU nodes. The documented node name is
also just "l2-cache".

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link: https://lore.kernel.org/all/20250410-dt-cpu-schema-v2-2-63d7dc9ddd0a@kernel.org/
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>

diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
index 1dc6fba4bf31e173ec422470f0e9d4e5826b33db..0a9212d3106f1348ee11e585c695a37b7d673993 100644 (file)
--- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
@@ -64,7 +64,7 @@
                        i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
                        next-level-cache = <&l2_cache_l0>;
 
-                       l2_cache_l0: l2-cache-l0 {
+                       l2_cache_l0: l2-cache {
                                compatible = "cache";
                                cache-size = <0x80000>;
                                cache-line-size = <64>;
@@ -88,7 +88,7 @@
                        i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
                        next-level-cache = <&l2_cache_l1>;
 
-                       l2_cache_l1: l2-cache-l1 {
+                       l2_cache_l1: l2-cache {
                                compatible = "cache";
                                cache-size = <0x80000>;
                                cache-line-size = <64>;
@@ -112,7 +112,7 @@
                        i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
                        next-level-cache = <&l2_cache_l2>;
 
-                       l2_cache_l2: l2-cache-l2 {
+                       l2_cache_l2: l2-cache {
                                compatible = "cache";
                                cache-size = <0x80000>;
                                cache-line-size = <64>;
@@ -136,7 +136,7 @@
                        i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
                        next-level-cache = <&l2_cache_l3>;
 
-                       l2_cache_l3: l2-cache-l3 {
+                       l2_cache_l3: l2-cache {
                                compatible = "cache";
                                cache-size = <0x80000>;
                                cache-line-size = <64>;